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Current Controlled Voltage Source Inverter Based
Amplifier for Power Hardware in Loop Simulation
Using Miniature Full Spectrum Simulator
Kapil Upamanyu, Mandela Chaitanya, G. Narayanan, Gurunath Gurrala
Department of Electrical Engineering, Indian Institute of Science, Bangalore, India
Email: [email protected], [email protected], [email protected],
[email protected]
Abstract—Impact of integration of distributed generation
(DG) sources on large power networks cannot be studied
accurately using computer simulations since building of
accurate models of a variety of DG sources and their controls
is challenging. Power hardware in the loop (PHIL) simulations
help realistic integration studies as they allow interfacing of
physical DG systems with well-established power grid models
running on real-time digital simulators. Power amplifiers are
required for interfacing the real-time simulator and the power
hardware in a PHIL simulation. The miniature full spectrum
simulator (mini-FSS) is an educational real-time simulator
developed under the National Mission on Power Electronics
Technology (NaMPET) Phase II, Government of India. To
extend the capabilities of the mini-FSS for PHIL simulation, a
10-kVA current controlled voltage source inverter (VSI) based
power amplifier is developed. This paper presents the design
aspects of the current controlled VSI amplifier. A synchronous
generator with constant excitation voltage and constant
frequency is simulated on the mini-FSS, and an actual threephase resistive load is interfaced to the mini-FSS using the
amplifier developed. The effectiveness of the current
controlled VSI interface is verified under various loading
conditions. The PHIL simulation results obtained using the
mini-FSS are found to be satisfactory.
Keywords—current control; miniature full spectrum
simulator; power amplifier; power hardware in loop simulation;
real-time simulation; synchronous generator; voltage source
Impact of high speed switching events can propagate to a
large portion in an interconnected power grid [1]. To study
the extent of the impact of power electronic based systems
(e.g. HVDC, wind, solar and energy storage systems), their
prototypes or their analog simulators are interfaced to a
digital simulator, which simulates a large portion of the
power grid in real-time [2], [3]. Co-simulation of the realtime simulator with the physical power hardware or its
analog simulator is termed power hardware in loop (PHIL)
simulation [2]. In PHIL simulations, the interfacing
mechanism between the digital and physical domains is
accomplished by digital to analog converters (DAC), analog
to digital converters (ADC) and power amplifiers [4]. Power
amplifiers are required in PHIL simulations due to the
This work was supported by the Dept. of Electronics and Information
Technology, Government of India, under the project titled “Development
and deployment of miniature-FSS in educational institutes'' under the
National Mission on Power Electronics Technology (NaMPET) Phase II.
978-1-4673-8962-4/16/$31.00 © 2016 IEEE
presence of physical power hardware that absorbs or sinks
power; hence the output signals of the simulators need to be
amplified to desired power levels [4], [5]. The power
amplifiers and sensors achieve the task of interfacing the
signal and power domains based on certain control
algorithm known as interface algorithm [6]. The interface
algorithm impacts the accuracy and stability of the
simulation significantly [4], [6].
A variety of power amplifiers has been proposed in the
literature for this purpose [5]. Switch mode power amplifiers
have become popular for PHIL simulations in recent years
because of their control flexibility and low cost [4], [5].
Voltage source inverter (VSI) is the most common choice as
switched mode power amplifier for it is capable of
generating a bipolar voltage across the load from a constant
dc source [7]-[9], Boost-based differential inverter has been
explored in [10], which has the capability of generating
higher voltage magnitude across the load as compared to the
usual buck-based voltage source converter. However,
control of such converter is relatively complex as the
voltage gain is non-linear and requires dynamic linearization
The ideal transformer model (ITM) interface algorithm
is most commonly employed in switch mode power
amplifiers because of its simplicity and ease of
implementation [4], [5]. ITM interface algorithms are of two
types, namely, voltage controlled and current controlled.
This depends on whether the hardware part of PHIL is
powered using a voltage source or a current source.
Accordingly, the VSI based power amplifier is operated
either in voltage controlled mode or current controlled
mode. Implementation of voltage controlled ITM is
relatively more common [7]-[10]. Current control of VSI for
PHIL applications has been investigated in [12], where
current control of the VSI is achieved using linear quadratic
state feedback controllers. This paper presents a relatively
simpler PI based current control of three-phase VSI for the
purpose of power amplification in PHIL simulations.
Most of the applications in literature use commercial
real-time simulators for PHIL. Commercially available realtime simulators are quite expensive. It is difficult for small
scale industries and educational institutions to afford such
equipment. The miniature full spectrum simulator (miniFSS) is a real-time simulator developed for educational
purposes under the National Mission on Power Electronics
Technology (NaMPET) Phase II, funded by Government of
India [13]. This paper attempts to extend the capabilities of
Figure 3: Current controlled ideal transformer model (ITM) interface
Fig. 1: Power HIL simulation
connotations [16].
the mini-FSS to make it capable of performing PHIL
simulations by developing a suitable power amplifier. The
paper presents the implementation of power hardware in
loop (PHIL) simulation with mini-FSS as the real-time
simulator and the power hardware developed.
The general purpose IGBT stack developed in [14], [15]
is used as the VSI. The design of the current controller for
the VSI is presented in detail. The design of the current
controller is validated through simulation and experimental
results. The current-controlled VSI-based power amplifier
along with the min-FSS is used for PHIL simulation of a
synchronous generator connected to a three-phase load.
In PHIL simulations, the entire system can be divided into
three parts, namely, the circuit being simulated on the realtime simulator, the hardware under test and the interface
hardware as shown in Fig.1. This section describes the
proposed PHIL simulation setup using the mini-FSS.
A. Test Case
The test case considered is a three-phase synchronous
generator feeding a three-phase resistive load whose single
phase equivalent circuit is shown in Fig.2. Here the load
used is an actual three-phase resistive load. But the
synchronous machine model (shown within dashed lines in
Fig. 2) is simulated in real-time on the educational miniFSS. The details of the mini-FSS are discussed in [13].
Further the stator voltages are represented by algebraic
equations (5) and (6). As seen from (4), the rate of change of
mechanical speed is maintained zero to simulate constant
frequency operation of the synchronous machine. Hence the
synchronous machine model reduces to a third order system.
The parameters for the synchronous machine are shown in
Table I.
TABLE I: Synchronous generator parameters [16]
B. Interfacing Algortihm
A current controlled ideal transformer model (ITM) [12]
shown in Fig.3 is used as the interface algorithm to realize
The synchronous generator is governed by equations (1)(6). The symbols shown in the equations have their usual
Fig. 2: Circuit diagram of test case for PHIL simulation
Fig. 4: Three-phase voltage source inverter
Fig. 5: PHIL simulation setup block diagram
the PHIL. The synchronous machine is modelled as a
current source in per unit system and solved in real-time on
the mini-FSS. The line currents of the machine are
calculated by the mini-FSS, and are provided as three-phase
current references to the power amplifier through the DAC
channels of the mini-FSS. The power amplifier injects these
currents into the actual three-phase load. The three-phase
voltages of the actual load are fed back as inputs to the miniFSS through its ADC channels. A low pass filter of time
constant 100 ms and a high pass filter of time constant 1 ms
are cascaded to form a band pass filter to eliminate the offset
voltage and noise at the ADC channels of the mini-FSS.
C. Interfacing Hardware
A three-phase 10 kVA current controlled voltage source
inverter is designed as a current amplifier to interface the
mini-FSS and actual three-phase load. Fig.4 shows the
circuit diagram of IGBT based three-phase voltage source
inverter. The input to VSI is a constant DC voltage.
Depending on the switching signals to IGBT, it generates a
three-phase time varying voltage output. With appropriate
switching signals three-phase sinusoidal AC voltage output
can be obtained. The VSI hardware design is based on the
general purpose IGBT stack developed in [14], [15]. The
VSI is controlled using a DSP which takes current
references from the mini-FSS. The output line voltages are
sensed and are fed back to the ADC channels of the miniFSS.
Fig.5 shows the complete block diagram of the PHIL
Fig. 7: Block diagram of practical VSI
simulation setup realized in the laboratory. A photograph of
the actual PHIL setup is shown in Fig.6. A block diagram of
a practical VSI is shown in Fig.7. The DC side of the
inverter is fed from a full bridge diode rectifier. A singlephase auto-transformer is connected to the input of the
rectifier. Output of the voltage source inverter is supplied to
the load.
Fig.8 shows a block diagram of current controlled VSI.
The current controller only for the phase-a is shown in the
figure. Current generated by the VSI are measured using
Hall-effect based current sensors and are fed to the current
controller. The current controller is implemented on a
TMS320F28335 DSP based digital controller. More details
about the current control of VSI based amplifier are
presented in the following section.
Fig. 6: Laboratory set up for the mini-FSS and the power amplifier
A. Current Controller Design
A block diagram of the current controller is shown in
Fig.9a. ADC, PI controller and sine PWM modulator are
part of the control circuit. Voltage source inverter, load and
current sensor constitute the plant to be controlled. Voltage
source inverter along with the modulator is modelled as a
gain G with a time delay Td. The load is modelled as a first
Fig. 8: Current controlled VSI
order system with gain 1/R and time constant Ts = L/R.
Current sensor is a low pass filter with a gain Kc and time
constant Tc. Kc also includes the gain of ADC. Transfer
function of the control loop is shown in Fig.9b. The
parameters of the system are given in the Table II.
Bode plot of the plant transfer function If(s)/d(s) is
shown in Fig.10a. The maximum steady state frequency of
the current reference is taken as power system frequency of
60 Hz. In order to make the steady state error equal to zero,
bandwidth of the current controller is kept at least 10 times
the frequency of the current reference, i.e., 3770 rad/s. The
zero of the PI controller is placed so as to compensate for
the most dominant pole of the loop, namely, the pole of the
current sensor. Kp is chosen such that the open loop gain is
equal to unity at the closed loop cut-off frequency (3770
rad/s). Bode plot of the transfer function of the plant along
with the controller in open loop, If(s)/Iref(s) is shown in
Fig.10b. The designed controller parameters are given in
Table II.
Fig.10c shows the Bode plot of the system with
controller in closed loop. The phase angle at zero crossover
frequency is less than -110°. Hence, the phase margin is
more than 70°. The gain at 60 Hz (i.e. 377 rad/s) is unity
with phase angle less than 10°.
B. Response of Current Controller
Sinusoidal response of the current controller is shown in
Fig.11. The references given to the controller are phase-b
and phase-c currents of amplitude 1 A and frequency 50 Hz.
Fig.11a and 11c show phase-b current along with its
reference for the simulation and experimental cases,
respectively. The corresponding phase-c currents are shown
in Fig.11b and 11d.
Fig.12 shows step response of the current controller.
Square wave signals of frequency 50 Hz and 180° out of
phase are given to phase-b and phase-c references. phase-b
current along with its reference for the simulation and
experimental cases are shown in Fig.12a and 12c,
respectively. The corresponding phase-c currents are shown
in Fig.12b and 12d. The current waveforms show an under
damped response with a settling time less than 5 ms.
The sinusoidal and step responses of the current
controller validate its design.
Fig. 9: (a) Block diagram of current control loop and (b) its transfer
function model
Real-time simulation of the synchronous machine is
carried out in p.u. values. The real load that needs to be
connected to the machine has to be matched in p.u. Since
generic synchronous machine parameters are assumed in the
simulation the p.u. currents need to be matched to the actual
load current. The base values for scaling the p.u. currents
depend on the ADC and DAC channel scaling of the miniFSS. They also depend on the gains of the voltage and
current sensors. The following subsections present the
procedure for assigning base values to the machine currents
to match the physical load current followed by the results
obtained from the PHIL simulation.
A. Scaling the Interface Currents and Voltages
1) Base Values Without Any Scaling: The synchronous
machine is modelled as a current source, requiring voltage
feedback. Hence the terminal voltages of the load are fed
back through the voltage sensors to the ADC channels of
the mini-FSS. The voltage sensors give a peak to peak
voltage (Vpp) output of ±1.5 V for a voltage of ±660 V (pp)
at load terminals. For ADC channel of the mini-FSS, 1 per
unit voltage corresponds to ±√2 V (pp), if the inputs from
ADC channel are not scaled inside mini-FSS. Hence the
base of external connected load can be calculated as
The DAC channel gives an output of ±0.816 V (pp) for
1 per unit current. For the current sensors, ±1 V (pp)
corresponds to peak to peak amperes of ±3.33 A (pp)
without any scaling. Hence the current base for external
connected load can be calculated as
TABLE II: System and controller parameters
Now, the power base (Pbase) and impedance base (Zbase)
values can be calculated as
Fig. 10: Bode plot of (a) open-loop plant transfer function If(s)/d(s), (b) If(s)/Iref(s) in open-loop and (c) If(s)/Iref(s) in closed-loop
(a) CH1: Phase-b current reference, (b) CH1: Phase-b current reference,
CH2: Phase-b current
CH2: Phase-c current
(a) CH1: Phase-b current reference, (b) CH1: Phase-c current reference,
CH2: Phase-b current
CH2: Phase-c current
(c) CH1: Phase-b current reference, (d) CH1: Phase-b current reference,
CH2: Phase-b current
CH2: Phase-c current
(c) CH1: Phase-b current reference, (d) CH1: Phase-c current reference,
CH2: Phase-b current
CH2: Phase-c current
Fig. 11: Sinusoidal response of current controller (top: simulation
(1.0A/div), bottom: hardware (0.67 A/div)), Time: 5 ms/div
Fig. 12: Step response of current controller (top: simulation (0.67 A/div),
bottom: hardware (0.67 A/div), Time: 5 ms/div
The VSI has a DC-bus voltage of 325 V. Hence, the
peak line to line voltage one can achieve is 280 V.
Therefore, scaling is used to bring down the line to line
voltage from 622 V peak to 280 V peak.
2) Base Values With Scaling: The feedback voltages are
scaled by a factor of Kv inside the mini-FSS after they are
read by ADC channels. Now the new voltage base Vbasenew
Similarly the output currents of the synchronous
generator are multiplied by a factor of Ki before they are
given as outputs through DAC channels of mini-FSS. Now
the new current base Ibasenew becomes
The power base and impedance base values can be
calculated as
B. Results
The results of the PHIL simulation for the test case
shown in Fig.2 are presented in this sub-section. The scaling
factors of Ki = 0.75, Kv = 2.2 are used in this case which
results in the following base values
x Vbase = 282.8 V
x Ibase = 2.04 A
x Pbase = 500 VA
x Zbase = 80 Ω
The resistance of the variable load is varied and the resulting
line currents and line voltages are measured. The results are
shown for 15 ohms, 30 ohms and 45 ohms resistance values
in Fig.13. Ch-1 shows the line current of the synchronous
generator as simulated by the mini-FSS. This signal is given
as the reference to the amplifier. The actual load current
flowing through the resistive load is shown in Ch-2 of the
Fig.13 and the line voltage of the load is shown in Ch-3. It
can be observed that the line current of the load is exactly
matching with the reference generated in the real-time
simulator in all the cases. The line voltages pick up sensor
noise but are phase shifted by 30°. These results validate the
CH1 (Blue) : Phase-c reference (3.33 A/div), CH2 (Red) : Line voltage b-c (220 V/div), CH3 (Green) : Phase-c current (3.33 A/div), Time: 10 ms/div
Fig. 13: Power hardware-in-loop simulation results for load resistance of (a) 15 ohm (b) 30 ohm and (c) 45 ohm
current controlled VSI design for resistive load and
demonstrate the capabilities of the mini-FSS for PHIL
A current controlled voltage source inverter based
power hardware in loop simulation using miniature full
spectrum simulator (mini-FSS) has been successfully
implemented. A synchronous generator with constant
frequency and constant excitation, supplying a three-phase
resistive load has been simulated using PHIL simulation
platform. A voltage source inverter is realized as a threephase current amplifier to amplify the currents simulated by
a synchronous generator in mini-FSS. A proportionalintegral (PI) controller based current control algorithm for
the voltage source inverter has been developed. The current
controller performance is tested for sinusoidal and step
responses. The performance of the current controller is
found to be satisfactory in tracking the test signals. The
PHIL simulations are tested with three different resistive
loadings and the results are found to be satisfactory. The
PHIL capabilities of the mini-FSS are demonstrated in this
paper using the designed current controlled VSI amplifier.
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