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DESCRIPTION JP2006067166

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DESCRIPTION JP2006067166
An object of the present invention is to facilitate adjustment of amplification gain. A first terminal
to which an AC signal is input, a second terminal connected to a power supply line through a first
resistance element, a third terminal for grounding, a second terminal, and a third terminal An
alternating current signal is input from the first terminal to a second resistance element provided
between signal lines wired between the first input terminal and an output according to the
alternating current signal is input to the other input terminal from the second terminal and the
second terminal A differential amplifier that is fed back via a signal line between two resistive
elements, and generates a positive offset voltage, which exceeds the maximum amplitude level of
an AC signal, between one input terminal and the other input terminal. A third resistance element
provided between signal lines connecting a signal line between the first terminal and one of the
input terminals and the third terminal, and the first resistance element and the second resistance
element The voltage waveform of the alternating current signal amplified based on the resistance
value is generated at the second terminal. To. [Selected figure] Figure 2
Amplifier
[0001]
The present invention relates to an amplification device.
[0002]
In control systems of various fields, the analog signal at the stage detected in the analog sensor is
a minute current / voltage level, so the first stage of the A preamp is provided.
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[0003]
Here, as an example of a control system having an amplification device, an electret condenser
microphone (hereinafter referred to as ECM) system (for example, refer to Patent Document 1
shown below) used mainly as a microphone on the transmitter side of a mobile phone It
illustrates to 12.
[0004]
The ECM system has a fixed terminal of an electret capacitor 203 in which a conductive thin film
is grounded at a Vin terminal 901 as opposed to a three-terminal amplifier 900 as an amplifying
device having a Vin terminal 901, a Vdd terminal 902 and a Gnd terminal 903. The Vdd terminal
902 is connected to the power supply line 201 via the load resistor 200 having a resistance
value R1, and the Gnd terminal 903 is grounded.
[0005]
The electret capacitor 203 is configured by opposing a conductive thin film and a fixed electrode.
The conductive thin film is charged in advance by a DC power supply (about several tens to 100
V), and when the audio signal is transmitted as a compressional wave of air to the conductive
thin film, the film vibrates.
Then, the capacitance value Cmic (about 3 pF) of the electret capacitor 203 changes, and an AC
voltage waveform (hereinafter referred to as an AC signal) is generated according to the change
of the capacitance value Cmic.
The alternating current signal usually has a direct current component at the ground potential,
and has a minute amplitude level of about several tens of millivolts.
[0006]
The three-terminal amplifier 900 has a gate electrode connected to a Vin terminal 901, a drain
electrode connected to a Vdd terminal 902, and a source electrode connected to a Gnd terminal
903. , J-FET) 904, and a resistive element 905 provided between signal lines wired between the
gate electrode and the source electrode of J-FET 904, for stabilizing the level of the gate
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electrode to the ground potential. Ru.
[0007]
Here, as the characteristics of the input part of the three-terminal amplifier 900, the following
points can be obtained for the input resistance (such as the resistance element 905) and the
input capacitance (such as the parasitic capacitance of the J-FET 904).
[0008]
First, in the case of the input resistance, a high resistance value is obtained.
That is, a high-pass filter is configured by the electret capacitor 203 and the input resistor, and in
order to input the three-terminal amplifier 900 without attenuating the audio signal in the
audible band of about 100 Hz, The resistance value of the resistor element 905 needs to be
several hundreds M to several G (Ω).
The cutoff frequency f1 of the high-pass filter is determined by the following (Expression 1)
when the resistance value of the input resistance is represented as Rin.
f1 = 1 / (2 × π × Rin × Cmic) (Expression 1) For example, when the capacitance value Cmic of
the electret capacitor 203 is 3 pF and the cutoff frequency f1 is 50 Hz, the resistance value Rin
of the input resistance is 1061 M It becomes (Ω).
[0009]
Next, in the case of the input capacitance, a low capacitance value is obtained. That is, the input
capacitance of the three-terminal amplifier 900 is connected in series with the electret capacitor
203. For this reason, when the capacitance value of the input capacitance is large, the alternating
current signal generated in the electret capacitor 203 is divided, and the level of the alternating
current signal may decrease at the stage of input to the three-terminal amplifier 900. In addition,
since the resistance value of the input resistance is large, the input capacitance is required to
have a low capacitance also in terms of suppressing the time constant determined by the product
of the input resistance and the input capacitance.
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[0010]
In addition, as an amplification element used in the three-terminal amplification device 900, a
source-grounded J-FET 904 excellent in balance in terms of high input resistance, low input
capacitance, and low noise is adopted. The amplification gain Av of the source-grounded J-FET
904 is determined by the following (formula 2) when the conductance of the J-FET 904 is
represented by gm and the attenuation by the input capacitance or the like is represented by
ATTin. Av = gm x Rl-ATTin (Equation 2) Japanese Patent Laid-Open No. 2003-243944
[0011]
By the way, the amplification gain of the J-FET changes according to the conductance gm of the
J-FET, as shown in (Expression 2). However, the conductance gm of the J-FET generally has a
potential variation of about “−50 to 200”%, and is such that the conductance gm is classified
and managed. Therefore, even if the J-FET of the same type is used, variation in the conductance
gm causes variation in the amplification gain of the J-FET, and consequently, an amplification
device using the J-FET (three-terminal amplification device 900 etc. Variations also occur in the
amplification gain of.
[0012]
Furthermore, as shown in FIG. 13, when the amplification gain of the J-FET is increased, the drain
saturation current Idss (about 200 μA) must also be increased. Since the consumption current
also increases as the drain saturation current Idss increases, the increase in amplification gain of
the J-FET is limited in terms of the consumption current. That is, a trade-off relationship holds
between the improvement of the amplification gain of the J-FET and the reduction of the current
consumption.
[0013]
As described above, as an amplification element used as an amplification device, although J-FET
is excellent in balance in terms of high input resistance, low input capacitance, and low noise,
there is a problem that it is difficult to adjust its amplification gain.
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[0014]
The first main aspect of the present invention for solving the problems described above
comprises a first terminal to which an AC signal is input, and a second terminal connected to a
power supply line through an external first resistance element. A third terminal to be grounded, a
second resistance element provided between signal lines connecting the second terminal and the
third terminal, and a positive power supply terminal are the second terminal and the second
terminal. The negative power supply terminal is connected to the signal line between the second
resistance element and the negative power supply terminal, and the first input terminal is
connected to one of the inversion / non-inversion input terminals. The AC signal is input from the
terminal, and an output according to the AC signal is fed back to the other input terminal
through a signal line between the second terminal and the second resistance element, Between
the one input terminal and the other input terminal, the one input terminal A differential
amplifier in which a positive offset voltage exceeding a maximum amplitude level of the AC
signal is generated in advance with reference to a ground potential, and a signal line between the
first terminal and the one input terminal; A third resistance element provided between signal
lines between which the third terminal is connected, for stabilizing the DC component of the AC
signal input to the one terminal to the ground potential; The voltage waveform of the alternating
current signal amplified based on the resistance value of the first resistance element and the
second resistance element is generated at the second terminal.
[0015]
Further, according to a second main aspect of the present invention for solving the abovementioned problems, the present invention is connected to a first power supply line through a
first terminal to which an AC signal is input and an externally attached first resistance element.
Between the second terminal, the third terminal to be grounded, the fourth terminal connected to
the second power supply line, and the signal line wired between the second terminal and the
third terminal The second resistance element to be provided and the positive power supply
terminal are connected to the fourth terminal, and the negative power supply terminal is
connected to the third terminal, and one input of the inverting / non-inverting input terminal The
AC signal is input to the terminal from the first terminal, and an output according to the AC
signal is input to the other input terminal between the second terminal and the second resistance
element. Feedback between the one input terminal and the other input terminal. Between a
differential amplifier in which a positive offset voltage exceeding the maximum amplitude level of
the AC signal is generated in advance with reference to the ground potential of one input
terminal, and the first terminal and the one input terminal A third resistor which is provided
between signal lines wired between the third signal line and the third terminal, and stabilizes the
direct current component of the alternating current signal input to the one terminal to the
ground potential A voltage waveform of the alternating current signal amplified based on the
resistance value of the first resistance element and the second resistance element is generated at
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the second terminal. .
[0016]
Further, according to a third main aspect of the present invention for solving the abovementioned problems, a first terminal to which an AC signal is input, a second terminal connected
to a power supply line, and a third terminal for grounding are provided. A first resistance element
and a second resistance element connected in series between signal lines connecting the second
terminal and the third terminal, the first resistance element, and the second resistance The fourth
terminal connected to the signal line between the elements and the positive power supply
terminal are connected to the second terminal, and the negative power supply terminal is
connected to the third terminal, and the inversion / non-conduction Among the inverting input
terminals, the alternating current signal is input to the one input terminal from the first terminal,
and an output according to the alternating current signal is input to the other input terminal. It is
fed back via a signal line between two resistance elements, and the one input terminal A
differential amplifier in which a positive offset voltage exceeding a maximum amplitude level of
the AC signal is generated in advance with respect to the potential of the one input terminal
between the other input terminal and the first input terminal; Between the signal line between
the third terminal and the signal line between the first terminal and the first input terminal, and
the DC component of the AC signal input to the first terminal. And a third resistance element
stabilized to the ground potential, wherein the voltage waveform of the alternating current signal
amplified based on the resistance value of the first resistance element and the second resistance
element is It is assumed that the fourth terminal is generated.
[0017]
Further, according to a fourth main aspect of the present invention for solving the abovementioned problems, a first terminal to which an AC signal is input, a second terminal connected
to a power supply line, and a third terminal for grounding are provided. A positive power supply
terminal is connected to the second terminal, a negative power supply terminal is connected to
the third terminal, and one of the inverting / non-inverting input terminals is the first terminal.
The alternating current signal is input from the input terminal, and an output according to the
alternating current signal is fed back to the other input terminal through the first resistance
element, and between the one input terminal and the other input terminal A differential amplifier
in which a positive offset voltage exceeding the maximum amplitude level of the AC signal is
generated in advance with reference to the potential of the one input terminal, the first resistance
element, and the other input terminal And the third terminal and the signal line between A
second resistance element provided between the signal lines wired between them, a fourth
terminal connected to the output of the differential amplifier, and a signal line between the first
terminal and the one input terminal And a third resistance element provided between signal lines
wired between the third terminal, for stabilizing the DC component of the AC signal input to the
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one terminal to the ground potential. The voltage waveform of the alternating current signal
amplified based on the resistance value of the first resistance element and the second resistance
element is generated at the fourth terminal.
[0018]
According to the present invention, it is possible to provide an amplification device in which
adjustment of amplification gain is easy.
[0019]
=== Three-Terminal Amplifying Device === <First Embodiment> << Configuration of ThreeTerminal Amplifying Device >> FIG. 1 shows an embodiment of “amplifying device” according
to claims 1 and 2 of the present application. FIG. 1 is a diagram showing a configuration of an
ECM system using a terminal amplification device 100.
Parts externally attached to the Vin terminal 101, the Vdd terminal 102, and the Gnd terminal
103 of the three-terminal amplifier 100 are the same as those of the conventional ECM system
shown in FIG.
[0020]
FIG. 2 is a diagram showing the configuration of the three-terminal amplifier 100.
In correspondence with claim 1 of the present application, the Vin terminal 101 is a "first
terminal", the Vdd terminal 102 is a "second terminal", the Gnd terminal 103 is a "third terminal",
and the load resistance 200 is " The first resistance element, the resistance element 104
corresponds to the “second resistance element”, the differential amplifier 105 corresponds to
the “differential amplifier”, and the resistance element 107 corresponds to the “third
resistance element”.
The N-type MOSFET 106 corresponds to the “transistor” according to claim 2 of the present
application.
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[0021]
The Vin terminal 101 is a terminal to which an AC signal whose DC component is the ground
potential (zero potential) is input.
The AC signal is an AC voltage waveform according to the audio signal generated in the electret
capacitor 203.
The Vdd terminal 102 is a terminal connected to the power supply line 201 of the power supply
voltage Vdd via a load resistor 200 having an externally attached resistance value R1.
The Gnd terminal 103 is a terminal for grounding.
[0022]
That is, the three-terminal amplifier 100 has the same terminal configuration as the conventional
three-terminal amplifier 900 in the conventional ECM system, and there is no need to change the
external circuit of the conventional three-terminal amplifier 900. It can be incorporated.
[0023]
The resistive element 104 having the resistance value Rs is provided between signal lines which
are wired between the Vdd terminal 102 and the Gnd terminal 103.
The resistive element 104 is used to set the drain-source current Ids of the N-type MOSFET 106
in combination with the load resistor 200.
[0024]
The differential amplifier 105 is configured as follows. First, the positive power supply terminal
is connected to the signal line between the Vdd terminal 102 and the resistive element 104, and
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the negative power supply terminal is connected to the Gnd terminal 103. Also, an AC signal is
input from the Vin terminal 101 to the non-inverted input terminal ("one input terminal"), and an
output according to the AC signal is input to the inverted input terminal ("other input terminal")
at the Vdd terminal. The signal is fed back via a signal line between 102 and the resistive element
104. That is, the differential amplifier 105 exhibits a voltage follower configuration in which the
amplification gain is "1".
[0025]
Furthermore, between the non-inverted input terminal and the inverted input terminal, a positive
offset voltage exceeding the maximum amplitude level of the AC signal based on the ground
potential (DC component) of the AC signal input to the non-inverting input terminal Vb is
generated in advance. That is, in the case where positive offset voltage Vb is not generated
between the non-inverted input terminal and the inverted input terminal, alternating current
input to the non-inverted input terminal between the source electrode of N-type MOSFET 106
and resistance element 104. The signal can not be reproduced as it is. This is because one of the
terminals of the resistance element 104 is grounded, so that the AC signal input to the noninverting input terminal is reproduced as a half wave having only positive amplitude. Therefore,
as the offset voltage Vb generated in advance between the non-inverted input terminal and the
inverted input terminal, the maximum amplification level of the AC signal input to the noninverted input terminal is exceeded.
[0026]
The N-type MOSFET 106 includes a gate electrode ("control electrode") for controlling
conduction / non-conduction, a drain electrode ("first electrode") connected to a signal line on the
side of the Vdd terminal 102, and the resistance element 104 side. It has a source electrode
("second electrode") connected to the signal line of (1) and is provided between signal lines
between the Vdd terminal 102 and the resistive element 104, exhibiting a so-called sourcegrounded configuration. Therefore, the amplification gain Av of the N-type MOSFET 106 can be
determined by “resistance value Rl / resistance value Rs”. Also, by connecting the output of the
differential amplifier 105 to the gate electrode of the N-type MOSFET 106 and connecting
between the source electrode of the N-type MOSFET 106 and the inverting input terminal, the
output of the differential amplifier 105 is non-inverting input terminal I am allowed to return.
[0027]
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The resistance element 107 having the resistance value Rin is provided between signal lines
between the signal line between the Vin terminal 101 and the non-inversion input terminal and
the Gnd terminal 103. The resistance value Rin of the resistance element 107 is about several
hundred meters to several G (Ω), and is used for the purpose of stabilizing the direct current
component of the alternating current signal input to the non-inverting input terminal to the
ground potential. This resistance element 107 may be replaced by a diode element. That is, there
is almost no potential difference between the anode and cathode electrodes of the diode element,
and the diode element is in a high impedance state. Furthermore, the resistor element 107 may
be replaced with a transistor which is constantly turned on. Note that the transistor in the
conductive state is, for example, an N-type MOSFET in which a power supply voltage is supplied
to a gate electrode, a P-type MOSFET in which a gate electrode is grounded, or the like.
[0028]
As described above, the three-terminal amplifier 100 is configured using the differential amplifier
105 instead of using the J-FET as in the conventional case. Then, three-terminal amplification
device 100 amplifies the voltage of the AC signal amplified according to amplification gain Av (=
resistance value Rl / resistance value Rs) determined by resistance value Rl of load resistance
200 and resistance value Rs of resistance element 104. A waveform is generated on the Vdd
terminal 102 and the Vout terminal 202.
[0029]
The voltage waveform of the AC signal appearing at the Vdd terminal 102 and the Vout terminal
202 is inverted in phase compared with the AC signal of the stage input to the non-inverting
input terminal because the N-type MOSFET 106 is source grounded. Become. Further, the DC
component of the AC signal appearing at the Vdd terminal 102 and the Vout terminal 202 is
obtained by subtracting the voltage drop of the load resistor 200 (= (Rl / Rs) Vb) from the power
supply voltage Vdd.
[0030]
In the three-terminal amplifier 100, since the J-FET is not used as in the conventional case, the
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variation in the conductance gm of the J-FET is not considered at all. In the general IC process,
the variation between the resistance values Rl and Rs is suppressed to about "± 20"%, so the
variation width of the amplification gain is smaller than that when using the conventional J-FET.
It can be reduced.
[0031]
Further, in the three-terminal amplifier 100, since the rank classification of the conductance gm
of the J-FET becomes unnecessary, it is possible to reduce the number of manufacturing
processes and stabilize the yield. Furthermore, in the J-FET, gate leakage is likely to occur at high
temperatures, but it is not necessary to take that into account.
[0032]
Furthermore, in the case of using the conventional J-FET, the drain saturation current Idds also
increases with an increase in amplification gain, so that the amplification gain is limited in terms
of current consumption. On the other hand, in the three-terminal amplification device 100, the
influence of current consumption is small based on the resistance value Rl of the load resistor
200 and the resistance value Rs of the resistance element 104, and the amplification gain can be
adjusted.
[0033]
As described above, according to the three-terminal amplifier 100 according to the present
invention, the amplification gain can be easily adjusted.
[0034]
<< Differential Amplifier >> A detailed configuration example of the differential amplifier 105 will
be described based on FIG.
The differential amplifier 105 has a P-type MOSFET 112 ("first transistor") connected to the Vin
terminal 101 and a gate electrode ("first control electrode") for controlling conduction / nonconduction. And a P-type MOSFET 113 ("second control electrode") connected to a connection
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point between the N-type MOSFET 106 and the resistance element 104 and a gate electrode
("second control electrode") for controlling conduction / non-conduction. And a differential
transistor pair configured by: In the differential transistor pair, the source electrodes of the two
are connected in common, and the drain electrode of the P-type MOSFET 110 in which the gate
electrode is biased and the source electrode is connected to the Vdd terminal 102 is connected to
this common source connection point. Is connected. Further, in the differential transistor pair, a
current mirror circuit configured by the N-type MOSFETs 114 and 115 is connected to the drain
electrode side.
[0035]
The differential amplifier 105 further includes a P-type MOSFET 111 whose gate electrode is
biased and a source electrode is connected to the Vdd terminal 102, and an output of the current
mirror circuit (junction point of P-type MOSFET 112 and N-type MOSFET 114). N-type MOSFET
116 connected in series and having a source electrode connected to Gnd terminal 103 is
connected in series. The connection point between the P-type MOSFET 111 and the N-type
MOSFET 116 is connected to the gate electrode of the N-type MOSFET 106.
[0036]
The differential amplifier 105 exhibits the following operation based on the configuration as
described above. That is, the current flowing from load resistor 200 to Vdd terminal 102 is
divided into drain-source current Ids of N-type MOSFET 106 and bias current Is to differential
amplifier 105, and bias current Is is P-type. The MOSFETs 110 and 111 are shunted to their
respective drain-source currents Ids.
[0037]
Here, in the differential transistor pair, according to the ratio of the signal level input to the noninversion input terminal (gate electrode of P-type MOSFET 112) and the inversion input terminal
(gate electrode of P-type MOSFET 113), The drain-source current Ids is distributed, and the
drain-source current Ids flows in the P-type MOSFETs 112 and 113, respectively.
[0038]
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Note that, since the differential amplifier 105 has a voltage follower configuration, the
alternating current components of the signals respectively input to the non-inverting input
terminal and the inverting input terminal have the same amplitude.
Further, the DC component of the signal input to each of the non-inverted input terminal and the
inverted input terminal is higher on the inverted input terminal side by the offset voltage Vb
generated in advance.
[0039]
Therefore, in the differential transistor pair, a drain-source current Ids smaller in the P-type
MOSFET 112 by the offset voltage Vb flows than in the P-type MOSFET 113. Then, a gate-source
voltage Vgs is induced in the N-type MOSFET 116 according to the difference between the drainsource current Ids. As a result, the connection point between the source electrode of N-type
MOSFET 106 and resistance element 104 has the same signal amplitude as the AC signal input to
the non-inverting input terminal, and the DC component is the offset voltage from the ground
potential. A signal shifted in level by Vb appears.
[0040]
Also, the signal appearing at the connection point between the source electrode of the N-type
MOSFET 106 and the resistive element 104 is converted into a current by the resistive element
104. Here, the drain electrode of the N-type MOSFET 106 is connected to the power supply line
201 through the load resistor 200, and a current similar to that of the resistor element 104 also
flows through the load resistor 200. As a result, at the Vout terminal 202, the phase is inverted
with respect to the AC signal input to the non-inverting input terminal, and the amplitude is
amplified by the amplification gain Av (= R1 / Rs). A signal appears. Needless to say, the
amplitude level of the output signal can be adjusted by the resistance value Rl of the load resistor
200.
[0041]
<Offset Voltage Vb> FIG. 4 is a schematic view of the P-type MOSFETs 112 and 113 that
constitute a differential transistor pair in the differential amplifier 105.
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[0042]
In the P-type MOSFETs 112 and 113, the drain electrode 11 and the source electrode 12 of the
P-type diffusion layer are formed on the N-type silicon substrate 10.
Further, on the N-type silicon substrate 10, the gate electrode 13 is formed between the drain
electrode 11 and the source electrode 12 via a silicon oxide film. Generally, the size of the gate
electrode 13 is set by the gate length L and the gate width W.
[0043]
Therefore, the offset voltage Vb between the non-inverted input terminal and the inverted input
terminal is, for example, the size of each gate electrode 13 so as to generate an offset voltage in
the gate-source voltage Vgs itself of each of the P-type MOSFETs 112 and 113. Can be generated
in advance. Specifically, for example, the voltage Vgs between the gate and the source of the Ptype MOSFET 113 may be set lower than that of the P-type MOSFET 112 in advance. Therefore,
the current density in each gate electrode 13 is made different by setting the gate width W of the
P-type MOSFET 113 longer or setting the gate length L shorter than the P-type MOSFET 112 in
advance, and a desired offset voltage is obtained. It gives rise to Vb.
[0044]
Second Embodiment The three-terminal amplifier 100 shown in FIG. 5 is the case where
resistance elements 108 and 109 are newly provided to the three-terminal amplifier 100 shown
in FIG. The three-terminal amplifier 100 shown in FIG. 5 corresponds to the “amplifier”
according to claim 3 of the present application. Therefore, in correspondence with claim 3 of the
present application, the resistance element 108 corresponds to the "fourth resistance element",
and the resistance element 109 corresponds to the "fifth resistance element".
[0045]
The resistive element 108 having the resistance value Rb is provided between signal lines in
which the source electrode of the N-type MOSFET 106 and the inverting input terminal are
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wired. The resistive element 109 having the resistance value Ra is provided between signal lines
between the signal line between the resistive element 108 and the inverting input terminal and
the Gnd terminal 103.
[0046]
That is, the differential amplifier 105 does not have a voltage follower configuration in which the
amplification gain is “1”, but a non-inversion amplifier configuration in which the amplification
gain is “(Ra + Rb) / Ra”. Therefore, assuming that the amplitude of the AC signal input to the
non-inverting input terminal is X, the amplitude of the signal appearing at the connection point
between the source electrode of N-type MOSFET 106 and resistance element 104 is “(Ra + Rb) /
Ra · X) ′ ′, which is higher than the amplification gain of the three-terminal amplifier 100
shown in FIG.
[0047]
By the way, in the differential amplifier 105, it is preferable that the bias to the differential
transistor pair is originally the same, and the magnitude of the offset voltage Vb is limited in
terms of specifications so as not to cause distortion of the differential output. Is done. Therefore,
the lower the offset voltage Vb, the better. Therefore, since the three-terminal amplifier 100
shown in FIG. 5 can be made higher than the amplification gain of the three-terminal amplifier
100 shown in FIG. 2, the necessary offset voltage Vb between the inverting input terminal and
the noninverting input terminal is The resistance value Rb of the resistance element 108 and the
resistance value Ra of the resistance element 109 can be reduced.
[0048]
Third Embodiment In the three-terminal amplifier 100 shown in FIGS. 2 and 5, the N-type
MOSFET 106 may be replaced with a P-type MOSFET, an NPN-type bipolar transistor, or a PNPtype bipolar transistor. FIG. 6 shows a case where the N-type MOSFET 106 in the three-terminal
amplifier 100 shown in FIG. 2 is replaced with a P-type MOSFET 119. As shown in FIG. 6, since
the gate electrode and the drain electrode are inverted as compared to the case of the N-type
MOSFET 106, the polarity of the differential amplifier 105 is also reversed.
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[0049]
=== Four-Terminal Amplifying Device === <First Embodiment> FIG. 7 shows an ECM system using
a four-terminal amplifying device 400 according to one embodiment of “amplifying device”
according to claims 4 and 5 of the present application. It is a figure showing composition.
[0050]
FIG. 8 is a diagram showing the configuration of the four-terminal amplifier 400. As shown in
FIG.
According to claim 4 of the present application, the Vin terminal 401 is a "first terminal", the Vdd
terminal 402 is a "second terminal", the Gnd terminal 403 is a "third terminal", and the Vdd2
terminal 404 is " The fourth terminal, the load resistance 200 is “first resistance element”, the
resistance element 405 is “second resistance element”, the differential amplifier 406 is
“differential amplifier”, and the resistance element 408 is “third resistance” Elements
respectively correspond to the elements. The N-type MOSFET 407 corresponds to the
“transistor” according to claim 5 of the present application.
[0051]
The Vin terminal 401 is a terminal to which an AC signal whose DC component is the ground
potential (zero potential) is input. The Vdd terminal 402 is a terminal connected to the power
supply line 201 of the power supply voltage Vdd via the load resistor 200 having the resistance
value R1 externally attached. The Gnd terminal 403 is a terminal for grounding. The Vdd2
terminal 404 is connected to the power supply line 206 of the power supply voltage Vdd2
independent of the power supply voltage Vdd.
[0052]
The resistance element 405 having the resistance value Rs is provided between signal lines
which are provided between the Vdd terminal 402 and the Gnd terminal 403.
[0053]
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The differential amplifier 406 is configured as follows.
First, the positive power supply terminal is connected to the Vdd 2 terminal 404 and the negative
power supply terminal is connected to the Gnd terminal 403. Also, an AC signal is input from the
Vin terminal 401 to the non-inverted input terminal ("one input terminal"), and an output
according to the AC signal is input to the inverted input terminal ("other input terminal") at the
Vdd terminal. It is fed back via the signal line between 402 and resistance element 405. That is,
differential amplifier 406 exhibits a voltage follower configuration. Furthermore, between the
non-inverted input terminal and the inverted input terminal, a positive offset voltage exceeding
the maximum amplitude level of the AC signal based on the ground potential (DC component) of
the AC signal input to the non-inverting input terminal Vb is generated in advance.
[0054]
The N-type MOSFET 407 has a gate electrode (“control electrode”) for controlling conduction /
non-conduction, a drain electrode (“first electrode”) connected to the signal line on the side of
the Vdd terminal 402, and the resistance element 405 side. It has a source electrode ("second
electrode") connected to the signal line of (1) and is provided between the signal lines between
the Vdd terminal 402 and the resistive element 405, and has a so-called source-grounded
configuration. Therefore, the amplification gain Av of the N-type MOSFET 407 can be determined
by “resistance value Rl / resistance value Rs”. Also, by connecting the output of the differential
amplifier 406 to the gate electrode of the N-type MOSFET 407 and connecting between the
source electrode of the N-type MOSFET 407 and the inverting input terminal, the output of the
differential amplifier 406 becomes the inverting input terminal. I am allowed to return.
[0055]
A resistive element 408 having a resistance value Rin (about several hundreds of meters to
several G (Ω)) has a signal line between the Vin terminal 401 and the non-inverting input
terminal and a signal line wired between the Gnd terminal 403. It is provided for stabilizing the
DC component of the AC signal input to the non-inverting input terminal to the ground potential.
Note that as in the resistor element 107, a diode element or a transistor in a conductive state
may be used.
[0056]
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Here, since the four-terminal amplification device 400 has basically the same configuration as
the three-terminal amplification device 100, as in the case of the three-terminal amplification
device 100, the effect of facilitating adjustment of amplification gain can be obtained. . The
configuration of the four-terminal amplifier 400 differs from the three-terminal amplifier 100 in
that the Vdd2 terminal 404 is provided, and the supply line of the power supply voltage Vdd2
supplied to the differential amplifier 406 is the load resistance 200. This point is independent of
the supply line of the power supply voltage Vdd supplied to the N-type MOSFET 407 via
[0057]
Therefore, in the case of the three-terminal amplifier 100, the current Ib supplied to the
differential amplifier 105 flows to the load resistor 200, and the resulting noise component is
superimposed on the waveform appearing at the Vout terminal 202. In the case of the fourterminal amplifier 400, the current Ib flowing from the power supply line 206 to the differential
amplifier 406 does not have to flow to the load resistor 200. Therefore, in the four-terminal
amplifier 400, the source voltage characteristic is excellent, and the S / N ratio of the waveform
appearing at the Vout terminal 202 is improved.
[0058]
Second Embodiment FIG. 9 is a view showing a configuration of an ECM system using a fourterminal amplifier 500 according to an embodiment of “Amplifier” according to claims 6 and 7
of the present application.
[0059]
FIG. 10 is a diagram showing the configuration of the four-terminal amplifier 500. As shown in
FIG.
According to claim 6 of the present application, the Vin terminal 501 is a "first terminal", the Vdd
terminal 502 is a "second terminal", the Gnd terminal 503 is a "third terminal", and the Vout
terminal 504 is " The fourth terminal, the load resistance 505 is a “first resistance element”,
the resistance element 506 is a “second resistance element”, the differential amplifier 507 is a
“differential amplifier”, and the resistance element 509 is a third resistance Elements
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respectively correspond to the elements. The N-type MOSFET 508 corresponds to the
“transistor” according to claim 7 of the present application.
[0060]
The Vin terminal 501 is a terminal to which an AC signal whose DC component is the ground
potential (zero potential) is input. The Vdd terminal 502 is a terminal connected to the power
supply line 201 of the power supply voltage Vdd. The Gnd terminal 503 is a terminal for
grounding. The Vout terminal 504 is a terminal connected to the connection point between the
load resistor 505 and the resistive element 506.
[0061]
The differential amplifier 507 is configured as follows. First, the positive power supply terminal
is connected to the Vdd terminal 502 and the negative power supply terminal is connected to the
Gnd terminal 503. Also, an AC signal is input from the Vin terminal 501 to the non-inverted input
terminal ("one input terminal"), and an output according to the AC signal is applied to the
inverted input terminal ("the other input terminal"). It is fed back via the signal line between 505
and resistance element 506. That is, differential amplifier 507 exhibits a voltage follower
configuration. Furthermore, between the non-inverted input terminal and the inverted input
terminal, a positive offset voltage exceeding the maximum amplitude level of the AC signal based
on the ground potential (DC component) of the AC signal input to the non-inverting input
terminal Vb is generated in advance.
[0062]
The N-type MOSFET 508 has a gate electrode (“control electrode”) for controlling conduction /
non-conduction, a drain electrode (“first electrode”) connected to the signal line on the load
resistance 505 side, and the resistance element 506 side. It has a source electrode ("second
electrode") connected to the signal line of (1) and is provided between the signal lines between
the load resistor 505 and the resistive element 506, and has a so-called source-grounded
configuration. Therefore, the amplification gain Av of the N-type MOSFET 508 can be determined
by “resistance value Rl / resistance value Rs”. Further, by connecting the output of the
differential amplifier 507 to the gate electrode of the N-type MOSFET 508 and connecting the
source electrode of the N-type MOSFET 508 to the inverting input terminal, the output of the
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differential amplifier 507 is made to be the inverting input terminal. I am allowed to return.
[0063]
The resistance element 509 having a resistance value Rin (about several hundreds of meters to
several G (Ω)) is connected between signal lines between the signal line between the Vin
terminal 501 and the noninverting input terminal and the Gnd terminal 503. It is provided for
stabilizing the DC component of the AC signal input to the non-inverting input terminal to the
ground potential. Note that as in the resistor element 107, a diode element or a transistor in a
conductive state may be used.
[0064]
Here, since the four-terminal amplifier 500 has basically the same configuration as the threeterminal amplifier 100 and the four-terminal amplifier 400, as in the case of the three-terminal
amplifier 100 and the four-terminal amplifier 400, The effect of facilitating adjustment of
amplification gain is obtained. A large difference between the configuration of the four-terminal
amplifier 500 and the three-terminal amplifier 100 and the four-terminal amplifier 400 is that a
Vout terminal 504 is provided and a load resistor 505 externally provided is incorporated. .
[0065]
Therefore, it becomes possible to set in advance the ratio of the resistance value Rl of the load
resistor 505 to the resistance value Rs of the resistance element 506 in accordance with the
required amplification gain inside the four-terminal amplification device 500. Further, the ratio of
the resistance value Rl of the load resistor 505 to the resistance value Rs of the resistor element
506 can suppress the variation to about several percent by arranging the load resistor 505 and
the resistor element 506 adjacent to each other in the CMOS process. .
[0066]
Third Embodiment FIG. 11 is a diagram showing the configuration of a four-terminal amplifier
500 according to an embodiment of the “amplifying device” according to claim 8 of the
present application.
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[0067]
The four-terminal amplifier 500 shown in FIG. 11 is the same as the four-terminal amplifier 500
shown in FIG. 10 except that the load resistor 505, the N-type MOSFET 508, and the resistor 506
are not provided. It is the case.
Note that, in correspondence with claim 8 of the present application, the resistive element 510
corresponds to the “first resistive element”, and the resistive element 511 corresponds to the
“second resistive element”.
[0068]
In the four-terminal amplifier 500 shown in FIG. 11, the differential amplifier 507 is configured
as follows. First, the positive power supply terminal is connected to the Vdd terminal 502 and the
negative power supply terminal is connected to the Gnd terminal 503. Further, an AC signal is
input from the Vin terminal 501 to the non-inverted input terminal ("one input terminal"), and an
output according to the alternating current signal is resistance value to the inverted input
terminal ("other input terminal"). It is fed back via the resistance element 510 of Rc. Further, a
signal line between the resistive element 510 and the inverting input terminal is connected to the
Gnd terminal 503 through the resistive element 511 having a resistance value Rd. That is, the
differential amplifier 507 has a configuration of a non-inverting amplifier whose amplification
gain is “(Rc + Rd) / Rc”. Furthermore, between the non-inverted input terminal and the
inverted input terminal, a positive offset voltage exceeding the maximum amplitude level of the
AC signal based on the ground potential (DC component) of the AC signal input to the noninverting input terminal Vb is generated in advance.
[0069]
Further, in the four-terminal amplifier 500 shown in FIG. 11, the output of the differential
amplifier 507 is directly connected to the Vout terminal 504. Here, since the amplification gain
can be adjusted based on the resistance value Rc of the resistance element 510 and the
resistance value Rd of the resistance element 511 in the four-terminal amplification device 500
shown in FIG. The effect of facilitating Further, the configuration can be simplified, for example,
the point that the N-type MOSFET 508 is not provided.
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[0070]
Fourth Embodiment In the four-terminal amplifier 400 shown in FIG. 8 and the four-terminal
amplifier 500 shown in FIGS. 10 and 11, N-type MOSFETs 407 and 508 are provided similarly to
the case of the three-terminal amplifier 100. It may be replaced with any of P-type MOSFET,
NPN-type bipolar transistor, and PNP-type bipolar transistor. When replacing with a P-type
MOSFET or a PNP-type bipolar transistor, the polarities of the differential amplifiers 406 and
507 are reversed.
[0071]
As mentioned above, although embodiment of this invention was described, embodiment
mentioned above is for facilitating understanding of this invention, and does not limit and
interpret this invention. The present invention can be modified / improved without departing
from the gist thereof, and the present invention also includes the equivalents thereof.
[0072]
For example, the three-terminal amplifier 100 and the four-terminal amplifiers 400 and 500 are
not limited to the application of the first stage amplifier of the ECM system. The three-terminal
amplifier 100 and the four-terminal amplifier 400, 500 can be used as an initial stage amplifier
that amplifies analog signals detected by analog sensors to various levels that can be handled in
the control system in various control systems. .
[0073]
It is a figure showing the composition of the ECM system concerning one embodiment of the
present invention. It is a figure which shows the structure of the 3 terminal amplifier which
concerns on one Embodiment of this invention. It is a figure which shows the detailed structure
of the 3 terminal amplifier which concerns on one Embodiment of this invention. It is a figure
explaining the structure of N type MOSFET. It is a figure which shows the structure of the 3
terminal amplifier which concerns on one Embodiment of this invention. It is a figure which
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shows the structure of the 3 terminal amplifier which concerns on one Embodiment of this
invention. It is a figure showing the composition of the ECM system concerning one embodiment
of the present invention. It is a figure which shows the structure of the 4 terminal amplifier
which concerns on one Embodiment of this invention. It is a figure showing the composition of
the ECM system concerning one embodiment of the present invention. It is a figure which shows
the structure of the 4 terminal amplifier which concerns on one Embodiment of this invention. It
is a figure which shows the structure of the 4 terminal amplifier which concerns on one
Embodiment of this invention. It is a figure which shows the structure of the conventional ECM
system. FIG. 6 is a diagram showing Vgs vs. Ids characteristics of a JFET.
Explanation of sign
[0074]
DESCRIPTION OF SYMBOLS 10 N type silicon substrate 11 drain electrode 12 source electrode
13 gate electrode 100, 900 3 terminal amplifier 105, 406, 507 differential amplifier 104, 107,
108, 109 resistance element 110, 111, 112, 113, 119 P type MOSFET 106, 114, 115, 116, 407,
508 N-type MOSFET 200, 505 Load resistance 201, 206 Power supply line 202 Vout terminal
203 Electret capacitor 101, 401, 501, 901 Vin terminal 102, 402, 502, 902 Vdd terminal 103,
403, 503, 903 Gnd terminal 404 Vdd2 terminal 405, 408 Resistor element 504 Vout terminal
400, 500 Four-terminal amplifier 506, 509, 510, 511 Resistor element 904 J-FET 90 Resistance
element
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