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DESCRIPTION JP2012004540

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DESCRIPTION JP2012004540
Abstract: In a solid-state imaging device, a MEMS element is provided on the same chip as the
solid-state imaging device to reduce the mounting area of the device and realize miniaturization
of the device. SOLUTION: A MEMS (Micro Electro Mechanical Systems) element (16a, 16b) is
formed on a device substrate 10 having a solid-state image pickup device portion (R5) having a
light receiving surface in which photodiodes divided for each pixel are arranged in a matrix. ,
17a, 17b, DF). [Selected figure] Figure 1
Solid-state imaging device, method of manufacturing the same, and electronic device
[0001]
The present invention relates to a solid-state imaging device, a method of manufacturing and
designing the same, and an electronic device, and more particularly to a solid-state imaging
device formed by mixing and mounting MEMS (Micro Electro Mechanical Systems) elements on
the same chip, a method of manufacturing the same, and an electronic device.
[0002]
Electronic devices such as digital video electronic devices and digital still electronic devices
include solid-state imaging devices such as, for example, charge coupled device (CCD) image
sensors and complementary metal-oxide-silicon transistor (CMOS) image sensors.
[0003]
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1
For example, Patent Document 1 discloses a camera module in which an angular velocity sensor
component is incorporated in the above-described conventional solid-state imaging device.
Specifically, the angular velocity sensor component is mounted on a housing that accommodates
an imaging system component.
[0004]
In the camera module of Patent Document 1, although the imaging system component and the
angular velocity sensor component are integrated as a camera module, they are not provided on
the same chip, so the mounting area and mounting volume are increased, and the apparatus is
miniaturized. Is difficult.
[0005]
For example, Patent Document 2 discloses a semiconductor device in which a CMOS circuit and
an electrostatic capacitance type MEMS element are integrated into one chip.
Although the CMOS circuit and the capacitive MEMS element are integrated on the same chip,
the configuration is not the same as the solid-state imaging device on which the MEMS element is
integrated.
[0006]
For example, Patent Document 3 shows a configuration in which a two-axis semiconductor
acceleration sensor made of a MEMS element is formed by wafer bonding.
In Patent Document 3, for example, a method of manufacturing a two-axis semiconductor
acceleration sensor is disclosed, wherein after forming a recess in at least one of the back surface
of the semiconductor substrate and the main surface of the support substrate, Bond the substrate
to the main surface side. Next, the semiconductor substrate is etched to form a supporting
portion, a weight portion, a beam, and a fixed electrode which are a part of the semiconductor
substrate. Provides a highly sensitive two-axis semiconductor acceleration sensor in a relatively
simple manufacturing process such as a process of forming a recess in a semiconductor substrate
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2
or a support substrate, a process of bonding the semiconductor substrate and the support
substrate, and a process of etching the semiconductor substrate. can do. Although the two-axis
semiconductor acceleration sensor by the MEMS element is formed by wafer bonding, it is not a
configuration in which the MEMS element is integrated into the same chip in the solid-state
imaging device.
[0007]
JP 2004-153503 JP JP 2009-139202 JP JP 2001-4658 JP
[0008]
The problem to be solved is that in a solid-state imaging device, it is difficult to provide the
MEMS element on the same chip as the solid-state imaging device.
[0009]
The solid-state imaging device according to the present invention includes a device substrate
having a solid-state imaging device portion having a light receiving surface in which photodiodes
divided for each pixel are arranged in a matrix, and MEMS (Micro Electro Mechanical) formed on
the device substrate. Systems) devices.
[0010]
The above-described solid-state imaging device of the present invention has a light receiving
surface in which photodiodes divided for each pixel are arranged in a matrix in the solid-state
imaging device portion of the device substrate.
A MEMS element is formed on the device substrate described above.
[0011]
In the method of manufacturing a solid-state imaging device according to the present invention, a
device substrate includes a step of forming a light receiving surface on which photodiodes
divided into pixels are arranged in a matrix, and MEMS (Micro Electro Mechanical) is formed on
the device substrate. Systems) to form a device.
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[0012]
In the method of manufacturing a solid-state imaging device according to the present invention
described above, the light receiving surface in which the photodiodes divided for each pixel are
arranged in a matrix is formed on the device substrate.
The method further includes the step of forming a MEMS element on the device substrate.
[0013]
In addition, the electronic device of the present invention includes a solid-state imaging device,
an optical system that guides incident light to an imaging unit of the solid-state imaging device,
and a signal processing circuit that processes an output signal of the solid-state imaging device
The imaging device includes a device substrate having a solid-state imaging device portion
having a light receiving surface in which photodiodes divided for each pixel are arranged in a
matrix, and a MEMS (Micro Electro Mechanical Systems) device formed on the device substrate.
Have.
[0014]
The electronic device of the present invention includes the solid-state imaging device, an optical
system for guiding incident light to the imaging unit of the solid-state imaging device, and a
signal processing circuit for processing an output signal of the solid-state imaging device.
Here, the solid-state imaging device has a light receiving surface in which photodiodes divided
for each pixel are arranged in a matrix in the solid-state imaging device viewing portion of the
device substrate.
A MEMS element is formed on the device substrate described above.
[0015]
According to the solid-state imaging device of the present invention, the MEMS element can be
provided on the same chip as the solid-state imaging device, and the mounting area of the device
can be reduced to realize downsizing of the device.
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[0016]
According to the method of manufacturing a solid-state imaging device of the present invention,
the MEMS element can be easily formed on the same chip as the solid-state imaging device, and
the mounting area of the device can be reduced to realize miniaturization of the device.
[0017]
According to the electronic device of the present invention, downsizing of the electronic device
can be realized by incorporating a solid-state imaging device in which the MEMS element is
provided on the same chip as the solid-state imaging device.
[0018]
Fig.1 (a) is a top view of the solid-state imaging device concerning 1st Embodiment of this
invention, FIG.1 (b) is a schematic cross section.
2 (a) is a plan view showing the details of the MEMS element provided in the solid-state imaging
device according to the first embodiment of the present invention, and FIGS. 2 (b) to 2 (e) are
each in FIG. 2 (a). It is a schematic cross section in BB 'of C, C-C', DD ', and EE'.
FIG. 3A to FIG. 3E are schematic cross-sectional views showing manufacturing steps of the
method for manufacturing a solid-state imaging device according to the first embodiment.
FIG. 4A to FIG. 4C are schematic cross-sectional views showing manufacturing steps of the
method for manufacturing a solid-state imaging device according to the first embodiment.
FIG. 5A to FIG. 5C are schematic cross-sectional views showing manufacturing steps of the
method for manufacturing a solid-state imaging device according to the first embodiment. 6A to
6C are schematic cross-sectional views showing manufacturing steps of the method for
manufacturing a solid-state imaging device according to the first embodiment. FIG. 7 is a
schematic cross-sectional view of a solid-state imaging device according to a second embodiment
of the present invention. FIG. 8 (a) is a plan view showing the details of the MEMS element
provided in the solid-state imaging device according to the second embodiment of the present
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invention, and FIG. 8 (b) is F-F 'in FIG. 8 (a). It is a schematic cross section in. FIG. 9A to FIG. 9C
are schematic cross-sectional views showing manufacturing steps of the method for
manufacturing a solid-state imaging device according to the second embodiment. FIG. 10A to FIG.
10D are schematic cross-sectional views showing manufacturing steps of the method for
manufacturing a solid-state imaging device according to the second embodiment. FIG. 11A to FIG.
11C are schematic cross-sectional views showing the manufacturing process of the method for
manufacturing a solid-state imaging device according to the second embodiment. FIG. 12A to FIG.
12C are schematic cross-sectional views showing manufacturing steps of the method for
manufacturing a solid-state imaging device according to the second embodiment. FIG. 13A to FIG.
13C are schematic cross-sectional views showing manufacturing steps of a method of
manufacturing a solid-state imaging device according to a second embodiment. FIG. 14A to FIG.
14B are schematic cross-sectional views showing the manufacturing process of the method for
manufacturing a solid-state imaging device according to the second embodiment. FIG. 15 is a
schematic cross-sectional view of a solid-state imaging device according to a third embodiment of
the present invention. FIG. 16 (a) is a plan view showing the details of the MEMS element
provided in the solid-state imaging device according to the third embodiment of the present
invention, and FIG. 16 (b) is a G-G 'in FIG. It is a schematic cross section in. FIG. 17A to FIG. 17B
are schematic cross-sectional views showing manufacturing steps of a method of manufacturing
a solid-state imaging device according to a third embodiment. FIG. 18A to FIG. 18B are schematic
cross-sectional views showing manufacturing steps of a method of manufacturing a solid-state
imaging device according to a third embodiment. FIG. 19 is a schematic cross-sectional view
showing a solid-state imaging device according to a first modification. FIGS. 20A and 20B are
schematic cross-sectional views showing a solid-state imaging device according to a second
modification. FIG. 21 is a schematic configuration diagram of an electronic device according to a
fourth embodiment of the present invention.
[0019]
Hereinafter, embodiments of a solid-state imaging device, a method of manufacturing and
designing the same, and an electronic device according to the present invention will be described
with reference to the drawings.
[0020]
The description will be made in the following order.
1. First embodiment (solid-state imaging device having XY axis position sensor on the same
chip as a MEMS element) 2. Second Embodiment (Solid-state Imaging Device Having Z-Axis
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Position Sensor on Same Chip as MEMS Element) Third embodiment (solid-state imaging device
having a microphone on the same chip as a MEMS element) First Modification 5. Second
Modification 6. Fourth Embodiment (Application to Electronic Device)
[0021]
First Embodiment [Configuration of Solid-State Imaging Device] The solid-state imaging device
according to the present embodiment is a solid-state imaging device having an XY-axis position
sensor on the same chip as a MEMS element. A MEMS (Micro Electro Mechanical Systems) device
is a micro-electro-mechanical device, and is generally referred to as a micromachine. For
example, it is possible to configure a sensor that has an adjustable position or a beam or a film or
the like due to inertial force or vibration, and electrically detects the position of the beam or film
to sense inertial force or vibration.
[0022]
The MEMS element can constitute, for example, a position sensor for detecting an XY axis with
respect to an inertial force, a position sensor for detecting a Z axis with respect to an inertial
force, a microphone for detecting air vibration, and the like. In the present embodiment, as
described above, the XY axis position sensor is provided as the MEMS element.
[0023]
FIG. 1 (a) is a plan view of a solid-state imaging device according to the present embodiment, and
FIG. 1 (b) is a schematic cross-sectional view. For example, a device substrate 10 made of a
silicon substrate or the like and a support substrate 20 are bonded together via an insulating film
15 such as silicon oxide to constitute a semiconductor substrate.
[0024]
The semiconductor substrate is divided into, for example, a MEMS element region R1, a lead-out
electrode region R2, a pad electrode region R3, a peripheral circuit region R4, and a solid-state
imaging device region R5.
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[0025]
For example, the MEMS element region 1 includes a vibrating electrode region R11 and a fixed
electrode region R12.
For example, in the vibrating electrode region R11, a vibrating electrode including the first
conductive layer 16a and the second conductive layer 17a is embedded.
[0026]
On the other hand, in the fixed electrode region R12, a fixed electrode formed of the first
conductive layer 16b and the second conductive layer 17b is embedded. A parallel plate type
capacitive element is configured from the vibrating electrode and the fixed electrode.
[0027]
Here, for example, the vibrating electrode has a shape projecting like a beam in the hollow
portion of the diaphragm DF structure. This structure will be described later.
[0028]
For example, an STI (Shallow Trench Isolation) element isolation insulating film 11 is formed on
the surface of the device substrate 10 on the insulating film 15 side to separate the pad electrode
region R3, the peripheral circuit region R4, the solid-state imaging device region R5 and the like.
ing. Furthermore, a diffusion layer 12 of a conductive impurity is formed in a necessary region of
the device substrate 10.
[0029]
For example, in the peripheral circuit region R4 and the solid-state imaging device region R5, the
gate electrode 13 is formed on the insulating film 15 side of the device substrate 10 via a gate
insulating film (not shown). 14 is formed.
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[0030]
In addition, for example, source / drain regions (not shown) are formed in the device substrate
10 in the formation region of the sidewall insulating film 14 and the both side portions thereof.
The MOS transistor is configured as described above.
[0031]
For example, in the solid-state imaging device region R5, on the surface of the device substrate
10 opposite to the insulating film 15, photodiodes (not shown) are formed separately for each
pixel. The light receiving surface is configured by arranging pixels including a photodiode in a
matrix.
[0032]
For example, the light shielding film 21 is formed on the surface on the light receiving surface
side of the device substrate 10 except for the light incident region of the pixel. In the light
incident area of the pixels, red, green and blue color filters 22 are formed for each pixel as
needed.
[0033]
For example, an on-chip lens 23 a made of a light transmitting resin is formed on the upper layer
of the color filter 22, and a resin layer 23 made of a material constituting the on-chip lens 23 a is
formed on the light shielding film 21.
[0034]
For example, in the pad electrode region R3, the peripheral circuit region R4, and the solid-state
imaging element region R5, the upper layer wiring 16 and the pad electrode 17 connected to the
gate electrode and the like of the MOS transistor are formed embedded in the insulating film 15.
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[0035]
In the pad electrode region R3, a pad opening P is formed to expose the pad electrode 17.
[0036]
Further, in the vibrating electrode region R11, an opening is formed in the same manner as the
pad opening P, and a diaphragm structure is formed.
[0037]
FIG. 2 (a) is a plan view showing the details of the MEMS element provided in the solid-state
imaging device according to this embodiment, and FIGS. 2 (b) to 2 (e) are BB in FIG. 2 (a)
respectively. It is a schematic cross section in ', CC', DD ', and EE'.
The device substrate 10 and the support substrate 20 are bonded to each other via the insulating
film 15.
[0038]
A first conductive layer 16a and a second conductive layer 17a constituting a flat plate-like
vibrating electrode, and a first conductive layer 16b and a second conductive layer 17b
alternately arranged in parallel in a flat plate shape constituting a fixed electrode .
Although the drawing shows three fixed electrodes and two vibrating electrodes disposed
therebetween, the present invention is not limited thereto.
[0039]
Both the fixed electrode and the vibrating electrode are embedded in the insulating film 15.
In the region of the fixed electrode and the vibrating electrode, an opening is formed from the
device substrate 10 side to the surface of the support substrate 20, and has a diaphragm
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structure DF.
[0040]
Here, as shown in FIGS. 2B and 2D, the air gap 15v is formed in communication with the air gap
forming the diaphragm structure DF on the support substrate 20 side of the vibrating electrode.
Thus, the vibrating electrode has a beam-like structure whose position is variable by inertial force
or vibration.
[0041]
Since there is no air gap 15v on the side of the fixed electrode on the support substrate 20 side,
the fixed electrode is in a sufficiently fixed state on the support substrate 20.
[0042]
A parallel plate type electrostatic capacitance element is constituted by the above-mentioned
vibrating electrode and fixed electrode, and the position of the vibrating electrode is variable due
to inertial force or vibration.
Therefore, by detecting the capacitance of the capacitance element, it is possible to detect the
displacement of the vibrating electrode and measure the inertial force or the vibration. In the
present embodiment, the MEMS element constitutes an XY axis position sensor.
[0043]
For example, an optical signal obtained by receiving light by the photodiode of each pixel in the
solid-state imaging device region R5 described above is converted to a voltage signal or the like
through floating diffusion or the like, and a CDS (correlated double sampling) circuit Then, it is
output as a pixel signal. Image data is configured from pixel signals output from each pixel. In the
peripheral circuit region R4, various image processing circuits are formed as needed, and image
processing can be performed on image data composed of the pixel signals obtained above.
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[0044]
The solid-state imaging device according to the present embodiment can provide the MEMS
element on the same chip as the solid-state imaging device, and can reduce the mounting area of
the device and realize downsizing of the device.
[0045]
Next, a method of manufacturing the solid-state imaging device according to the present
embodiment will be described.
3 to 6 are schematic sectional views showing manufacturing steps of the method for
manufacturing a solid-state imaging device according to the present embodiment.
[0046]
First, as shown in FIG. 3A, the STI isolation insulating film 11 is formed to separate, for example,
the pad electrode region R3, the peripheral circuit region R4, and the solid-state imaging device
region R5 of the device substrate 10. The depth of the trench for STI element isolation is about
0.2 to 0.5 μm, and is formed by being buried with silicon oxide or the like by a CVD (Chemical
Vapor Deposition) method or the like.
[0047]
Next, as shown in FIG. 3B, for example, in the MEMS element region R1 (the vibrating electrode
region R11 and the fixed electrode region R12), the solid-state imaging device region R5, etc. A
diffusion layer 12 is formed. For example, ion implantation for forming a pixel, forming a
peripheral circuit, and forming a vibrating electrode is performed. Here, in order to reduce the
number of processes, ion implantation for the vibrating electrode may be combined with ion
implantation for pixel formation and peripheral circuit formation. However, in the vibrating
electrode, only impurities having the same polarity are ion-implanted. Here, although the
conductive impurity may be either N-type or P-type, it is desirable to select the conductive
impurity so that ion implantation with high concentration can be performed as much as possible.
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[0048]
Next, as shown in FIG. 3C, the gate insulating film and the gate electrode 13 (not shown) are
formed in, for example, the peripheral circuit region R4 and the solid-state imaging device region
R5, and conductive impurities are formed using the gate electrode 13 as a mask. Are implanted
to form an extension region (not shown). Next, sidewall insulating films 14 are formed on both
sides of the gate electrode 13, and conductive impurities are ion-implanted using the sidewall
insulating film 14 as a mask to form source / drain regions. Impurity activation processing such
as RTA (Rapid Thermal Annealing) processing is appropriately performed as necessary, and a
MOS transistor is formed as described above.
[0049]
Next, as shown in FIG. 3D, for example, a MOS transistor is covered, and an insulating film 15a
such as silicon oxide is formed on the entire surface. In the insulating film 15, the upper layer
wiring 16 is appropriately embedded in the pad electrode region R3, the peripheral circuit region
R4, and the solid-state imaging element region R5, and connected to this to form the pad
electrode 17. Further, in the vibrating electrode region R11 and the fixed electrode region R12,
the first conductive layers 16a and 16b are formed in the same manner as the upper layer wiring
formation step, and the second conductive layers 17a and 17b are formed in the same manner as
the pad electrode 17 formation step. Form. In the above, the first conductive layers 16a and 16b
and the second conductive layers 17a and 17b are laid out so as to be electrodes of a parallel
plate capacitive element as shown in FIG.
[0050]
Next, as shown in FIG. 3E, for example, silicon oxide or the like is formed on the pad electrode 17
and the upper layer of the second conductive layers 17a and 17b. In FIG. 3E, the insulating film
15a is integrated with the above-described insulating film 15a. Next, for example, the upper
surface of the insulating film 15b is planarized by a CMP (Chemical Mechanical Polishing)
process.
[0051]
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Next, as shown in FIG. 4A, for example, a resist film PR1 having an opening in the vibrating
electrode region R11 is formed into a pattern, and anisotropic etching such as reactive ion
etching (RIE) is performed using this as a mask. An air gap 15v is formed to expose the upper
portion of the second conductive layer 17a. The etching amount is set to a sufficient amount that
the vibrating electrode is not bonded when the device substrate and the support substrate are
bonded.
[0052]
Next, as shown in FIG. 4B, for example, a separately prepared supporting substrate 20 is attached
to the upper surface of the insulating film 15b. On the bonding surface of the support substrate
20, an insulating film 15c of silicon oxide whose surface is flattened is formed in advance.
[0053]
Next, as shown in FIG. 4C, plasma bonding is performed, for example, in the range of room
temperature to 400 ° C. to integrate the insulating film 15b and the insulating film 15c. In FIG.
4C, the insulating film 15 b and the insulating film 15 c are integrated and shown as the
insulating film 15. The plasma bonding process is performed, for example, in a temperature
range in which the wiring is not damaged such as melting. Here, the air gap 15v is left at the
interface between the insulating film 15b and the insulating film 15c.
[0054]
Next, as shown in FIG. 5A, for example, the device substrate 10 is subjected to polishing and
etching from the surface of the device substrate 10 opposite to the insulating film 15, and the
device substrate 10 having a thickness of about 700 to 800 μm is imaged. The film thickness is
reduced to about 2 to 4 μm which is a film thickness necessary and sufficient for the sensor.
[0055]
Steps after FIG. 5 (b) are shown upside down with the steps up to FIG. 5 (a).
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Next, as shown in FIG. 5B, W or Al or the like is deposited on the surface of the device substrate
10 opposite to the insulating film 15 by sputtering, for example, to form a light shielding film 21.
Next, for example, a resist film PR2 having a pattern for protecting a region to be left as a light
shielding film is formed, and etching processing is performed using the resist film PR2 as a mask
to pattern the light shielding film 21. Here, the pattern of the light shielding film 21 is a pattern
which opens the light incident area of the pixel in the solid-state imaging element area R5.
Further, for example, the pattern is also opened in the pad electrode region R3. Further, in the
vibrating electrode region R11, regions on both sides sandwiching the vibrating electrode are
formed into a pattern that is opened.
[0056]
Next, as shown in FIG. 5C, the resist film PR2 is removed, and for example, in the solid-state
imaging device region R5, red, green and blue color filters in the light incident region of the pixel
from which the light shielding film is removed. 22 are formed for each pixel. The color filter 22
applies a color filter material, for example, and performs pattern exposure to form a
predetermined pattern.
[0057]
Next, as shown in FIG. 6A, for example, a light transmitting resin layer 23 is applied to form a
resist film PR3 for on-chip lens formation. For example, after forming a normal resist film, the
resist film PR3 can be patterned so as to leave an on-chip lens region, melted by heat treatment,
and formed so as to have a spherical surface by surface tension.
[0058]
Next, as shown in FIG. 6B, the entire surface is etched back by dry etching, the shape of the resist
film PR3 is transferred to the surface of the resin layer 23, and the on-chip lens 23a is formed.
[0059]
Next, as shown in FIG. 6C, a resist film PR4 having a pattern for opening the pad opening is
formed and dry etching is performed to form the pad opening P, and the pad electrode 17 is
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exposed.
Here, in the vibrating electrode region R11, the resist film PR4 has a pattern in which regions on
both sides sandwiching the vibrating electrode are opened. Thus, an opening communicating
with the air gap 15v is formed in the vibrating electrode region R11 by the above-described
etching process, and the diaphragm structure DF is formed. The above-mentioned etching is
performed so as to reach the air gap 15v without removing the pad electrode.
[0060]
The resist PR4 for pad opening is removed. After that, it is manufactured in the same manner as
a method of manufacturing a normal solid-state imaging device. As described above, it is possible
to manufacture a solid-state imaging device in which the MEMS element is mixedly mounted on
the same substrate shown in FIG.
[0061]
According to the manufacturing method of the solid-state imaging device of the present
embodiment, the MEMS element can be easily formed on the same chip as the solid-state imaging
device, and the mounting area of the device can be reduced to realize the miniaturization of the
device.
[0062]
For example, in a camera module having the configuration of Patent Document 1, MEMS
elements such as a solid-state imaging device and a position sensor are separately created, and
each is mounted to create a camera module, and the yield is lowered when each chip is mounted.
Will occur.
In addition, it is necessary to separately provide a position control circuit for the position sensor
and an image processing circuit for the solid-state imaging device in each chip, which increases
the chip area, resulting in an increase in manufacturing cost. When performing position control
for camera shake correction of the camera module based on position information using a
position sensor, image data from the solid-state imaging device requires wiring for transmitting
information between the solid-state imaging device and the position sensor, which results in
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module manufacturing cost Will increase.
[0063]
The solid-state imaging device of the present embodiment has the MEMS elements mixedly
mounted on the same chip, and the yield is reduced compared to the case where the MEMS
elements such as the solid-state imaging device and the position sensor are separately prepared
and modularized by mounting. It can be suppressed. In addition, the chip area can be reduced to
reduce the manufacturing cost. Further, the wiring for transmitting information between the
solid-state imaging device and the MEMS element as the position sensor can be accommodated in
the same chip, and the manufacturing cost can be reduced.
[0064]
Second Embodiment [Configuration of Solid-State Imaging Device] The solid-state imaging device
according to the present embodiment is a solid-state imaging device having a Z-axis position
sensor on the same chip as a MEMS element. The configuration is substantially the same as that
of the first embodiment except that the MEMS element is a Z-axis position sensor.
[0065]
FIG. 7 is a schematic cross-sectional view of the solid-state imaging device according to the
present embodiment. For example, a device substrate 10 made of a silicon substrate or the like
and a support substrate 20 are bonded together via an insulating film 15 such as silicon oxide to
constitute a semiconductor substrate.
[0066]
The semiconductor substrate is divided into, for example, a MEMS element region R1, a lead-out
electrode region R2, a pad electrode region R3, a peripheral circuit region R4, and a solid-state
imaging device region R5.
[0067]
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For example, it is embedded in the MEMS element region R1 so as to be parallel to the substrate
of the vibrating electrode 17c and the fixed electrode 18a.
A parallel plate type electrostatic capacitance element is constituted by the vibrating electrode
17c and the fixed electrode 18a.
[0068]
In the lead-out electrode region R2, a conductive layer 16c connected to the vibrating electrode
17c is embedded in the insulating film 15.
[0069]
Here, for example, the vibrating electrode 17c has a shape projecting in a beam shape in the
hollow portion of the diaphragm DF structure.
[0070]
FIG. 8 (a) is a plan view showing the details of the MEMS element provided in the solid-state
imaging device according to the present embodiment, and FIG. 8 (b) is a schematic crosssectional view at FF 'in FIG. 8 (a). It is.
The vibrating electrode 17 c and the fixed electrode 18 a are embedded in the insulating film 15
that bonds the device substrate and the support substrate.
An opening is formed from the side of the vibrating electrode 17c to the vicinity of the fixed
electrode 18a, and has a diaphragm structure DF.
[0071]
Here, as shown in FIG. 8B, a gap 15v is formed in communication with the diaphragm structure
DF between the vibrating electrode 17c and the fixed electrode 18a. Thus, the vibrating electrode
17c has a beam-like structure whose position is variable by inertial force or vibration. The fixed
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electrodes 18a are connected by wiring or the like from the side of the vibrating electrode 17c.
[0072]
A parallel plate type electrostatic capacitance element is constituted by the above-mentioned
vibrating electrode and fixed electrode, and the position of the vibrating electrode is variable due
to inertial force or vibration. Therefore, by detecting the capacitance of the capacitance element,
it is possible to detect the displacement of the vibrating electrode and measure the inertial force
or the vibration. In the present embodiment, the MEMS element constitutes a Z-axis position
sensor.
[0073]
The solid-state imaging device according to the present embodiment can provide the MEMS
element on the same chip as the solid-state imaging device, and can reduce the mounting area of
the device and realize downsizing of the device.
[0074]
Next, a method of manufacturing the solid-state imaging device according to the present
embodiment will be described.
9 to 14 are schematic cross-sectional views showing manufacturing steps of the method for
manufacturing a solid-state imaging device according to the present embodiment.
[0075]
First, the steps up to the step shown in FIG. 9A are performed in the same manner as in the first
embodiment. However, the vibrating electrode 17c is formed in the MEMS element region R1,
and the conductive layer 16c connected to the vibrating electrode 17c is formed in the lead-out
electrode region R2.
[0076]
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Next, as shown in FIG. 9B, for example, silicon oxide or the like is formed on the pad electrode 17
and the upper layer of the vibrating electrode 17c. In FIG. 9B, the insulating film 15a in FIG. 9A is
integrated as an insulating film 15b. Next, for example, the upper surface of the insulating film
15b is planarized by a CMP (Chemical Mechanical Polishing) process.
[0077]
Next, as shown in FIG. 9C, for example, a resist film PR5 for opening the MEMS element region
R1 is formed into a pattern, and anisotropic etching such as reactive ion etching (RIE) is
performed using this as a mask. An air gap 15v1 is formed to expose the upper portion of the
vibrating electrode 17c. Similarly, a part of the area in which the vibrating electrode 17c is not
formed in the MEMS element area R1 is opened to form the air gap 15v2. The position of the air
gap 15v2 is formed in accordance with the air gap 15v3 described later. The etching amount is
set to a sufficient amount that the vibrating electrode is not bonded when the device substrate
and the support substrate are bonded.
[0078]
Meanwhile, a support substrate is separately prepared. For example, as shown in FIG. 10A, silicon
oxide is deposited on the support substrate 2 by the CVD method or the like to form the
insulating film 15d. Next, as shown in FIG. 10B, a conductive layer 18 of Al, AlSi, AiCu or the like
is formed on the insulating film 15d by sputtering, for example. Next, as shown in FIG. 10C, for
example, a resist film PR6 having a pattern for protecting a region left as a fixed electrode is
patterned, and the conductive layer 18 is patterned to form a fixed electrode 18a. Next, as shown
in FIG. 10D, for example, silicon oxide or the like is formed on the upper layer of the fixed
electrode 18a. In FIG. 10D, the insulating film 15d in FIG. 10C is integrated with the insulating
film 15d to be shown as the insulating film 15c. Next, as shown in FIG. 11A, for example, the
upper surface of the insulating film 15c is planarized by CMP.
[0079]
Next, as shown in FIG. 11B, for example, a resist film PR7 having a position corresponding to the
above-mentioned air gap 15v2 is formed and patterned, and anisotropic etching such as RIE
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(reactive ion etching) is performed using this as a mask Do the processing. Thus, the air gap
15v3 for exposing a part of the fixed electrode 18a is formed. Next, as shown in FIG. 11C, the
resist film PR7 is removed.
[0080]
Next, as shown in FIG. 12A, for example, the support substrate 20 is attached to the upper
surface of the insulating film 15b from the insulating film 15c side.
[0081]
Next, as shown in FIG. 12B, plasma bonding is performed, for example, in the range of room
temperature to 400 ° C. to integrate the insulating film 15b and the insulating film 15c.
In FIG. 12B, the insulating film 15b and the insulating film 15c are integrated and shown as the
insulating film 15. The plasma bonding process is performed, for example, in a temperature
range in which the wiring is not damaged such as melting. Here, the air gap 15v1 is left at the
interface between the insulating film 15b and the insulating film 15c. Further, the air gap 15v2
and the air gap 15v3 formed by alignment are integrated into one air gap 15v2.
[0082]
Next, as shown in FIG. 12C, for example, the device substrate 10 is subjected to polishing and
etching from the surface of the device substrate 10 opposite to the insulating film 15, and the
device substrate 10 having a thickness of about 700 to 800 μm is imaged. The film thickness is
reduced to about 2 to 4 μm, which is a film thickness necessary and sufficient for the sensor.
[0083]
Steps after FIG. 13A are shown upside down with the steps up to FIG. 12C.
Next, as shown in FIG. 13A, W or Al or the like is deposited on the surface of the device substrate
10 opposite to the insulating film 15 by sputtering, for example, to form a light shielding film 21.
Next, for example, a resist film PR2 having a pattern for protecting a region to be left as a light
shielding film is formed, and etching processing is performed using the resist film PR2 as a mask
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to pattern the light shielding film 21. Here, the pattern of the light shielding film 21 is a pattern
which opens the light incident area of the pixel in the solid-state imaging element area R5.
Further, for example, the pattern is also opened in the pad electrode region R3. Further, in the
MEMS element region R1, the region of the vibrating electrode 17c and the region of the air gap
15v2 are formed in a pattern that opens.
[0084]
Next, as shown in FIG. 13B, the resist film PR2 is removed, and for example, in the solid-state
imaging device region R5, the red, green and blue color filters are formed in the light incident
region 22 are formed for each pixel. The color filter 22 applies a color filter material, for
example, and performs pattern exposure to form a predetermined pattern.
[0085]
Next, as shown in FIG. 13C, for example, a light transmitting resin layer 23 is applied to form a
resist film PR3 for on-chip lens formation. For example, after forming a normal resist film, the
resist film PR3 can be patterned so as to leave an on-chip lens region, melted by heat treatment,
and formed so as to have a spherical surface by surface tension.
[0086]
Next, as shown in FIG. 14A, the entire surface is etched back by dry etching, the shape of the
resist film PR3 is transferred to the surface of the resin layer 23, and the on-chip lens 23a is
formed.
[0087]
Next, as shown in FIG. 14B, a resist film PR8 having a pattern for opening the pad opening is
formed, and dry etching is performed to form a pad opening P1, and the pad electrode 17 is
exposed.
Here, as the resist film PR8, in the MEMS element region R1, a pattern is formed in which the
region of the vibrating electrode 17c and the region of the air gap 15v2 are opened. Thus, an
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opening communicating with the air gap 15v1 is formed in the MEMS region R1 by the abovedescribed etching process, and the diaphragm structure DF is formed. In addition, a pad opening
P2 for the fixed electrode 18a reaching the air gap 15v2 is formed. The above-mentioned etching
is performed so as to reach the air gaps 15v1 and 15v2 without removing the pad electrode 17
and the vibrating electrode 16c.
[0088]
The resist PR8 for pad opening is removed. After that, it is manufactured in the same manner as
a method of manufacturing a normal solid-state imaging device. As described above, it is possible
to manufacture a solid-state imaging device in which the MEMS element is mixedly mounted on
the same substrate shown in FIG.
[0089]
According to the manufacturing method of the solid-state imaging device of the present
embodiment, the MEMS element can be easily formed on the same chip as the solid-state imaging
device, and the mounting area of the device can be reduced to realize the miniaturization of the
device.
[0090]
Third Embodiment [Configuration of Solid-State Imaging Device] The solid-state imaging device
according to the present embodiment is a solid-state imaging device having a microphone on the
same chip as a MEMS element.
The configuration is substantially the same as that of the first embodiment except that the MEMS
element is a microphone.
[0091]
FIG. 15 is a schematic cross-sectional view of a solid-state imaging device according to the
present embodiment. For example, a device substrate 10 made of a silicon substrate or the like
and a support substrate 20 are bonded together via an insulating film 15 such as silicon oxide to
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constitute a semiconductor substrate.
[0092]
The semiconductor substrate is divided into, for example, a MEMS element region R1, a lead-out
electrode region R2, a pad electrode region R3, a peripheral circuit region R4, and a solid-state
imaging device region R5.
[0093]
For example, it is embedded in the MEMS element region R1 so as to be parallel to the substrate
of the vibrating electrode 17c and the fixed electrode 18a.
A parallel plate type electrostatic capacitance element is constituted by the vibrating electrode
17c and the fixed electrode 18a.
[0094]
In the lead-out electrode region R2, a conductive layer 16c connected to the vibrating electrode
17c is embedded in the insulating film 15.
[0095]
Here, for example, the vibrating electrode 17c is formed of a film stretched with a gap from the
bottom of the hollow portion of the diaphragm DF structure.
[0096]
16 (a) is a plan view showing the details of the MEMS element provided in the solid-state imaging
device according to this embodiment, and FIG. 16 (b) is a schematic cross-sectional view of G-G
'in FIG. 16 (a). It is.
The vibrating electrode 17 c and the fixed electrode 18 a are embedded in the insulating film 15
that bonds the device substrate and the support substrate.
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An opening is formed from the side of the vibrating electrode 17c to the vicinity of the fixed
electrode 18a, and has a diaphragm structure DF.
[0097]
Here, as shown in FIG. 16B, for example, a circular opening 17d is formed in a part of the
vibrating electrode 17c, and the air gap 15v is communicated with the diaphragm structure DF
between the vibrating electrode 17c and the fixed electrode 18a. It is formed. Thus, the vibrating
electrode 17c has a film-like structure whose position is variable by vibration or the like. The
fixed electrodes 18a are connected by wiring or the like from the side of the vibrating electrode
17c.
[0098]
A parallel plate type electrostatic capacitance element is constituted by the above-mentioned
vibrating electrode and fixed electrode, and the position of the vibrating electrode is variable by
vibration or the like. Therefore, by detecting the capacitance of the capacitance element, it is
possible to detect the displacement of the vibrating electrode and measure the vibration of air. As
described above, in the present embodiment, the MEMS element constitutes a microphone.
[0099]
The solid-state imaging device according to the present embodiment can provide the MEMS
element on the same chip as the solid-state imaging device, and can reduce the mounting area of
the device and realize downsizing of the device.
[0100]
Next, a method of manufacturing the solid-state imaging device according to the present
embodiment will be described.
17 to 18 are schematic cross-sectional views showing manufacturing steps of the method for
manufacturing a solid-state imaging device according to the present embodiment.
18-04-2019
25
[0101]
First, steps up to the step shown in FIG. 17A are performed in the same manner as in the first
embodiment. However, the vibrating electrode 17c is formed in the MEMS element region R1,
and the conductive layer 16c connected to the vibrating electrode 17c is formed in the lead-out
electrode region R2.
[0102]
Next, as shown in FIG. 17B, for example, silicon oxide or the like is formed on the pad electrode
17 and the upper layer of the vibrating electrode 17c. In FIG. 17B, the insulating film 15a in FIG.
17A is integrated as an insulating film 15b. Next, for example, the upper surface of the insulating
film 15b is planarized by a CMP (Chemical Mechanical Polishing) process. Next, for example, a
resist film PR5 having an opening in the MEMS element region R1 is formed into a pattern, and
anisotropic etching such as RIE (reactive ion etching) is performed using this as a mask to open
the space 15v1 exposing the upper portion of the vibrating electrode 17c Form Similarly, a part
of the area in which the vibrating electrode 17c is not formed in the MEMS element area R1 is
opened to form the air gap 15v2. The position of the air gap 15v2 is formed in accordance with
the air gap 15v3 described later. The etching amount is set to a sufficient amount that the
vibrating electrode is not bonded when the device substrate and the support substrate are
bonded.
[0103]
On the other hand, similarly to the second embodiment, the support substrate 20 is separately
prepared. For example, an insulating film is formed on the support substrate 20, the fixed
electrode 18a is embedded, and the air gap 15v3 is formed.
[0104]
Next, as shown in FIG. 18A, for example, the above support substrate 20 is attached to the upper
surface of the insulating film 15b from the insulating film 15c side, and plasma bonding is
18-04-2019
26
performed in the range of room temperature to 400 ° C. The film 15 b and the insulating film
15 c are integrated to form an insulating film 15. The air gaps 16v2 and the air gaps 15v3
formed in alignment are integrated into one air gap 15v2. Further, for example, the film
thickness is reduced from the surface of the device substrate 10 opposite to the insulating film
15, and W or Al is deposited on the surface of the device substrate 10 opposite to the insulating
film 15 to pattern the light shielding film 21. Next, the color filter 22 and the on-chip lens 23a
are formed.
[0105]
Next, as shown in FIG. 18B, a resist film PR8 having a pattern for opening the pad opening is
formed, and dry etching is performed to form a pad opening P1, and the pad electrode 17 is
exposed. Here, as the resist film PR8, in the MEMS element region R1, a pattern is formed in
which the region of the vibrating electrode 17c and the region of the air gap 15v2 are opened.
Thus, an opening communicating with the air gap 15v1 is formed in the MEMS region R1 by the
above-described etching process, and the diaphragm structure DF is formed. In addition, a pad
opening P2 for the fixed electrode 18a reaching the air gap 15v2 is formed. The abovementioned etching is performed so as to reach the air gaps 15v1 and 15v2 without removing the
pad electrode 17 and the vibrating electrode 16c.
[0106]
The resist PR8 for pad opening is removed. After that, it is manufactured in the same manner as
a method of manufacturing a normal solid-state imaging device. As described above, it is possible
to manufacture a solid-state imaging device in which the MEMS element is mixedly mounted on
the same substrate shown in FIG.
[0107]
According to the manufacturing method of the solid-state imaging device of the present
embodiment, the MEMS element can be easily formed on the same chip as the solid-state imaging
device, and the mounting area of the device can be reduced to realize the miniaturization of the
device.
[0108]
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27
First Modified Example Configuration of Solid-State Imaging Device FIG. 19 is a schematic crosssectional view showing a solid-state imaging device according to a first modified example.
The solid-state imaging device according to the present embodiment has the same configuration
as the solid-state imaging device according to the first embodiment. However, instead of the pad
opening, a contact hole CH reaching the pad electrode is formed, the plug 24 is embedded in the
contact hole CH, and the upper layer wire 25 is connected and formed. In the first to third
embodiments described above, the pad opening P is not necessarily required, and the diaphragm
structure of the MEMS element can be formed in combination with the opening process of the
contact hole CH. Besides the above, a via hole may be formed instead of the contact hole.
[0109]
Second Modified Example Configuration of Solid-State Imaging Device FIGS. 20A and 20B are
schematic cross-sectional views showing a solid-state imaging device according to a second
modified example. The solid-state imaging device according to the present embodiment has the
same configuration as the solid-state imaging device according to the first embodiment. However,
the MEMS element is not a parallel plate type electrostatic capacitance element but a
piezoelectric element or a MOS type position sensor. The MEMS element shown in FIG. 20A is a
MEMS element using a piezoelectric film 16x as a vibrating electrode. FIG. 20 (a) corresponds to
the cross section of FIG. 2 (d) of the first embodiment, and the position of the vibrating electrode
is variable due to inertial force or vibration. For this reason, when the vibrating electrode 16x
vibrates, an electromotive force is generated in the piezoelectric film, which is detected by the
detection circuit 26 to detect the displacement of the vibrating electrode and to measure the
inertial force or the vibration. There is.
[0110]
In the MEMS element shown in FIG. 20B, the source 27S and the drain 27D are formed in the
surface layer of the support substrate 20 on the vibrating electrode side. A MOS transistor
having a vibrating electrode as a gate electrode is configured. FIG. 20B corresponds to the cross
section of FIG. 2D of the first embodiment, and the position of the vibrating electrode is variable
due to inertial force or vibration. Therefore, the drain current of the MOS transistor changes as
the vibrating electrode 16a vibrates, and detection of this by the detection circuit 28 makes it
possible to detect displacement of the vibrating electrode and measure inertial force or vibration.
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ing.
[0111]
Fourth Embodiment [Application to Electronic Device] FIG. 21 is a schematic configuration
diagram of an electronic device which is an electronic device according to the present
embodiment. The electronic device according to the present embodiment is an example of a
video electronic device capable of still image shooting or moving image shooting. The electronic
device according to the present embodiment includes an image sensor (solid-state imaging
device) 50, an optical system 51, a signal processing circuit 53, and the like. In the present
embodiment, the solid-state imaging device according to the first embodiment described above is
incorporated as the image sensor 50 described above.
[0112]
The optical system 51 focuses image light (incident light) from a subject on the imaging surface
of the image sensor 50. As a result, the signal charge is accumulated in the image sensor 50 for a
certain period. The accumulated signal charge is taken out as an output signal Vout. The shutter
device controls a light irradiation period and a light shielding period to the image sensor 50.
[0113]
The image processing unit supplies drive signals for controlling the transfer operation of the
image sensor 50 and the shutter operation of the shutter device. The signal transfer of the image
sensor 50 is performed by the drive signal (timing signal) supplied from the image processing
unit. The signal processing circuit 53 performs various signal processing on the output signal
Vout of the image sensor 50 and outputs it as a video signal. The video signal subjected to the
signal processing is stored in a storage medium such as a memory or output to a monitor.
[0114]
According to the electronic device according to the present embodiment, for example, in the
electronic device having a solid-state imaging device for capturing a color image of a generation
whose cell pitch is particularly 3 μm or less, variation in light interference intensity of light
incident on the light receiving surface is reduced Color unevenness can be suppressed.
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[0115]
Although the above embodiment has been described by way of example in which the present
invention is applied to the image sensor 50 in which unit pixels for detecting signal charges
according to the light amount of visible light as physical quantities are arranged in a matrix. The
application to the sensor 50 is not limited.
The present invention is applicable to general column-type solid-state imaging devices in which
column circuits are arranged for each pixel row of the pixel array unit.
[0116]
Furthermore, the present invention is not limited to the application to a solid-state imaging
device that detects the distribution of incident light quantity of visible light and captures it as an
image. Solid-state imaging device that captures the distribution of incident amount of infrared
rays, X-rays, or particles as an image, or, in a broad sense, fingerprint detection that senses the
distribution of other physical quantities such as pressure or capacitance, The present invention is
applicable to all solid-state imaging devices (physical quantity distribution detection devices)
such as sensors.
[0117]
Further, the present invention is not limited to the application to a solid-state imaging device, and
can be applied to an electronic device having an imaging function such as a digital still electronic
device, a video electronic device, and a cellular phone. In addition, the module form mounted in
the electronic device, that is, the electronic device module may be used as an imaging device.
[0118]
In an imaging device such as a video electronic device, a digital still electronic device, and an
electronic device module for a mobile device such as a cellular phone, the image sensor 50
according to the above-described embodiment can be used as the solid-state imaging device.
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[0119]
The solid-state imaging device and the method of manufacturing the same according to each of
the above embodiments have the following advantages.
By integrating the image sensor and the position sensor / microphone into one chip instead of
creating them separately, the mounting of the sensor chip on the camera module is reduced from
2/3 times to 1 time, and the yield is reduced during mounting. Can be reduced.
[0120]
Since a module common to the position control circuit of the position sensor and the voice
conversion circuit of the microphone and the image processing circuit of the image sensor can be
shared, the chip area can be smaller than separately made, and the cost as a module can be
reduced.
[0121]
By integrating the image sensor, the position sensor, and the microphone into one chip, it is
possible to add a camera shake prevention function, an upper / lower discrimination function, an
audio recording function, and the like to the camera module with almost no increase in mounting
area and mounting volume.
This can contribute to slimming and downsizing of a portable device with an imaging function.
[0122]
When the image sensor and the position sensor are integrated into one chip, both the image by
the image sensor and the information of the position sensor can be processed in one chip. As a
result, it is possible to perform the position control for camera shake prevention using both the
image information of the image sensor and the information of the position sensor at low cost
without increasing the wiring cost.
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[0123]
The present invention is not limited to the above description. For example, as a solid-state
imaging device, any of a CMOS image sensor and a CCD image sensor can be applied. The solidstate imaging device is not limited to the backside illumination type, and can also be applied to a
normal front side illumination type solid-state imaging device. Besides the above, various
modifications can be made without departing from the scope of the present invention.
[0124]
DESCRIPTION OF SYMBOLS 10 ... Device substrate, 11 ... Element isolation insulation film, 12 ...
Diffusion layer, 13 ... Gate electrode, 14 ... Sidewall insulation film, 15 ... Insulation film, 15v,
15v1, 15v2, 15v3 ... Air gap, 16 ... Upper layer wiring, 16a , 16b: first conductive layer, 16c:
conductive layer, 17: pad electrode, 17a, 17b: second conductive layer, 17c: vibrating electrode,
18: conductive layer, 18a: fixed electrode, 20: support substrate, 21: light shielding Film, 22:
color filter, 23: resin layer, 23a: on-chip lens, 24: plug, 25: upper layer wiring, 26: detection
circuit, 27S: source, 27D: drain, 28: detection circuit, 50: image sensor, DESCRIPTION OF
SYMBOLS 51 ... Optical system, 53 ... Signal processing circuit, PR1-PR8 ... Resist film, P, P1, P2 ...
Pad opening part, DF ... Diaphragm
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