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DESCRIPTION JP2013066055

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DESCRIPTION JP2013066055
Abstract: A receiving circuit capable of amplifying a received signal including a signal of a
negative signal level using an operational amplifier operating with a single positive power supply.
A reception circuit (100) includes a signal unit (10) having a reference terminal (11) and a signal
terminal (12) for outputting a reception signal based on the voltage of the reference terminal
(11), a positive input terminal (21) and a negative input terminal (22). An operational amplifier
20 having an output terminal 23 and operated by receiving a voltage from a single positive
power source E2, a first load unit 30 connected between the output terminal 23 and the negative
input terminal 22, and a signal A reference voltage unit including a second load unit 40
connected between the terminal 12 and the negative input terminal 22 and a diode 52 whose
cathode side is grounded and whose anode side is connected to the reference terminal 11 and
the positive input terminal 21 And 50. [Selected figure] Figure 1
Receiver circuit
[0001]
Some aspects of the present invention relate to, for example, a receiving circuit that receives
ultrasonic waves and outputs a voltage signal.
[0002]
Conventionally, in an ultrasonic transmitting and receiving apparatus having an ultrasonic
transducer, a transmitting circuit, and a receiving circuit, the transmitting circuit, the receiving
circuit, and the ultrasonic transmitting and receiving device are circuit-connected by a
transformer having three independent windings. According to Japanese Patent Application LaidOpen Publication No. 2008-112118, a device with low noise and high output is known.
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[0003]
Japanese Patent Application Laid-Open No. 7-75198
[0004]
By the way, in the receiving circuit, when the received signal is amplified by the operational
amplifier and output, when the operational amplifier operated by the single positive power
supply is used, the operational amplifier can not output the signal of the negative voltage. .
Therefore, there is a problem that when the received signal includes a signal of a negative signal
level, the receiving circuit can not amplify the received signal faithfully.
[0005]
Some aspects of the present invention are made in view of the above problems, and include
amplifying a received signal including a signal of negative signal level using an operational
amplifier operating with a positive single power supply. One of the objectives is a receiver circuit
that can
[0006]
A receiving circuit according to the present invention has a signal section having a reference
terminal and a signal terminal for outputting a reception signal based on the voltage of the
reference terminal, a positive input terminal, a negative input terminal and an output terminal.
Connected between the signal terminal and the negative input terminal: an operational amplifier
circuit that operates by applying a voltage from a single positive power supply, a first load
connected between the output terminal and the negative input terminal, and And a reference
voltage unit including a diode whose cathode side is grounded and whose anode side is
connected to the reference terminal and the positive input terminal.
[0007]
According to this configuration, the reference voltage unit includes a diode whose cathode is
connected to ground (GND) and whose anode is connected to the reference terminal and the
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positive input terminal.
Thereby, when the voltage (potential) of the ground (GND) is 0 (zero) [V], the voltages of the
reference terminal 11 and the positive input terminal become higher by the voltage of the
voltage drop in the forward direction of the diode.
Here, in the reception signal output from the signal terminal, a signal whose level is lower than
the voltage of the reference terminal is set to 0 (zero) [V] by setting the voltage for the voltage
drop in the forward direction of the diode sufficiently high. Get higher.
Thus, the reference voltage unit includes a diode whose cathode is connected to ground (GND)
and whose anode is connected to the reference terminal and the positive input terminal, so that
the received signal is 0 (zero) [V]. ] It can be a signal containing only higher level signals (signals
of positive voltage).
[0008]
Preferably, the signal unit is driven by the aforementioned single power supply.
[0009]
According to this configuration, the signal unit is driven by a single power supply that applies a
voltage to the operational amplifier.
Thus, the signal unit and the operational amplifier are driven by the same single power supply.
This allows the receiving circuit to operate with a single power supply.
[0010]
Preferably, the reference voltage unit further includes a resistor.
[0011]
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According to this configuration, the reference voltage unit further includes the resistor.
As a result, while the voltage of the reference terminal and the positive input terminal is made
higher than the voltage (potential) of the ground (GND), the ground (GND) passes through the
diode as compared with the case where the reference voltage unit does not include a resistor.
Can reduce the current flowing through the Thus, the power consumption of the receiving circuit
can be reduced, and energy saving can be achieved.
[0012]
Preferably, said resistor is a variable resistor.
[0013]
According to this configuration, the resistor included in the reference voltage unit is a variable
resistor.
Thus, by setting the resistance value of the variable resistor to an appropriate value, the current
flowing through the diode to ground (GND) can be further reduced. Thereby, the power
consumption of the receiving circuit can be further reduced, and energy saving can be achieved.
[0014]
According to the receiving circuit of the present invention, the reference voltage unit includes a
diode whose cathode is connected to ground (GND) and whose anode is connected to the
reference terminal and the positive input terminal. It can be a signal including only a signal
(signal of positive voltage) higher than 0 (zero) [V]. As a result, the received signal can be
amplified using an operational amplifier that operates from a positive single power supply, and
the amplified signal output from the output terminal of the operational amplifier does not lack
the signal (information) of the received signal (faithfully ) It becomes an amplified signal.
[0015]
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It is a block diagram explaining the receiving circuit in a 1st embodiment. It is a block diagram
explaining an example of a virtual receiving circuit. It is a graph which shows an example of the
time change of the receiving signal of the receiving circuit shown in FIG. 2, and an amplification
signal. It is a graph which shows an example of the time change of the receiving signal of the
receiving circuit shown in FIG. 1, and an amplification signal. It is a block diagram explaining the
modification of the receiving circuit shown in FIG. It is a block diagram explaining the receiving
circuit in a 2nd embodiment. It is a block diagram explaining the receiving circuit in a 3rd
embodiment. It is a block diagram explaining the modification of the receiving circuit shown in
FIG.
[0016]
Hereinafter, embodiments of the present invention will be described. In the following description
of the drawings, the same or similar parts are denoted by the same or similar symbols. However,
the drawings are schematic. Therefore, specific dimensions and the like should be determined in
light of the following description. Moreover, it is a matter of course that portions having different
dimensional relationships and ratios among the drawings are included. In the following
description, the upper side of the drawing is referred to as “upper”, the lower side as
“lower”, the left side as “left”, and the right side as “right”.
[0017]
First Embodiment FIGS. 1 to 5 show a first embodiment of a receiving circuit according to the
present invention. FIG. 1 is a block diagram for explaining the receiving circuit 100 in the first
embodiment. As shown in FIG. 1, the reception circuit 100 includes a signal unit 10, an
operational amplifier (operational amplifier) 20, a first load unit 30, a second load device 40, and
a reference voltage unit 50.
[0018]
The signal unit 10 is, for example, a microphone that receives an ultrasonic wave. The signal unit
10 includes a reference terminal 11 and a signal terminal 12. Further, the signal unit 10 includes
a power supply terminal 13 and is connected to the power supply terminal 13 to a power supply
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E1 which is a positive voltage source. The signal unit 10 can operate at a voltage applied from
the power supply E1, for example, a voltage in the range of about 2.7 to 6.0 [V]. That is, the
signal unit 10 receives ultrasonic waves, and converts the received ultrasonic waves into a
received signal (voltage signal) S1 based on the voltage of the reference terminal 11 based on the
voltage applied from the power supply E2. , And the reception signal S1 is output from the signal
terminal 13.
[0019]
The operational amplifier 20 includes a positive (plus) input terminal 21, a negative (minus)
input terminal 22, and an output terminal 23. The operational amplifier 20 also includes a pair of
power supply terminals 24 and 25. One power supply terminal 24 is grounded (connected to
ground (GND)), and the other power supply terminal 25 is connected to a power supply E2 that is
a positive voltage source. Be done. The operational amplifier 20 can operate at a voltage applied
from the power supply E1, for example, a voltage in the range of about 1.5 to 3.6 [V]. That is, the
operational amplifier 20 amplifies the signals input from the positive input terminal 21 and the
negative input terminal 22 using the voltage applied from the power supply E2, and outputs the
amplified signal S2 from the output terminal 23. Thus, the operational amplifier 20 operates
(operates) with a single positive power supply.
[0020]
The first load unit 30 is configured to include a resistor 31 and a capacitor (capacitor) 32. The
first load unit 30 is connected between the output terminal 23 and the negative input terminal
22. A part of the amplified signal S2 output from the output terminal 23 is consumed by the first
load unit 30 (voltage is reduced), and is negatively feedbacked (negative feedback) to the
negative input terminal 22. The resistor 31 and the capacitor 32 are connected in parallel to
each other and function as a low pass filter that removes relatively high frequency noise.
[0021]
The second load unit 40 is configured to include a resistor 41, a capacitor (capacitor) 42, and a
resistor 43. The second load unit 40 is connected between the signal terminal 12 and the
negative input terminal 22. A part of the reception signal S1 output from the signal terminal 12
is consumed by the second load unit 40 (voltage is reduced) and input to the negative input
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terminal 22. The resistor 41 and the capacitor 42 are connected in series and function as a high
pass filter that removes relatively low frequency noise. The resistor 43 is connected between the
signal terminal 12 and a connection terminal 51 of a reference voltage unit 50 described later.
By appropriately setting the resistance values of the resistor 31 and the resistor 41 and the
capacitances of the capacitor 32 and the capacitor 42, the resistor 31, the capacitor 32, the
resistor 41 and the capacitor 42 can be Act as a pass filter.
[0022]
Although the example which contains a some element (device) as an example of the 1st load part
30 and the 2nd load part 40 was shown in this embodiment, it is not limited to this. The inverting
amplifier circuit may be formed by the operational amplifier 20 and the first load unit 30 and the
second load unit 40 so that the operational amplifier 20 has a predetermined gain (or
amplification factor), for example, the first load unit At least one of the 2020 and the second load
unit 40 may be configured by one resistor. Further, the first load unit 30 and the second load
unit 40 are not limited to the case where they are configured by a resistor or a capacitor
(capacitor), and may include other elements (devices) such as a coil, a transistor, and a diode. .
[0023]
The reference voltage unit 50 is configured to include a connection terminal 51 and a diode 52.
The reference terminal 11 and the positive input terminal 21 are connected to the connection
terminal 51. The diode 52 has a cathode connected to ground (connected to ground (GND)) and
an anode connected to the connection terminal 51. Thus, when the voltage (potential) of the
ground (GND) is 0 (zero) [V], the voltage (potential) of the connection terminal 51, that is, the
voltages of the reference terminal 11 and the positive input terminal 21 The voltage Vb [V] for
the forward voltage drop of the
[0024]
FIG. 2 is a block diagram for explaining an example of the virtual reception circuit 200. As shown
in FIG. In FIG. 2, components similar to those of the receiving circuit 100 are denoted by similar
symbols, and the detailed description thereof is omitted. As shown in FIG. 2, the reception circuit
200 includes a signal unit 110, an operational amplifier (operational amplifier) 120, a first load
unit 130, a second load unit 140, and a reference voltage unit 150. The signal unit 110 is the
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signal unit 10 shown in FIG. 1, the operational amplifier 120 is the operational amplifier 20
shown in FIG. 1, the first load unit 130 is the first load unit 30 shown in FIG. 1, and the second
load unit 140 is FIG. It is the same as the 2nd load part 40 shown, respectively. Reference voltage
unit 150 differs from reference voltage unit 50 shown in FIG. 1 in that diode 52 is not included.
That is, the connection terminal 151 is grounded as it is (connected to the ground (GND)) without
passing through a diode. As a result, the voltages (potentials) of the reference terminal 111 and
the positive input terminal 121 become 0 (zero) [V].
[0025]
FIG. 3 is a graph showing an example of the time change of the reception signal S3 and the
amplification signal S4 of the reception circuit 200 shown in FIG. In the graph of FIG. 3, the
vertical axis is voltage, and the horizontal axis is time t. The signal unit 110 outputs the reception
signal S3 from the signal terminal 112 based on the voltage of the reference terminal 111. For
example, when the signal unit 110 receives a predetermined ultrasonic wave, as shown in the
upper part of FIG. The reception signal S3 has a waveform whose center of amplitude is the
voltage of the reference terminal 111, that is, 0 (zero) [V]. In this case, the reception signal S3 is
both a signal at a level higher than 0 (zero) [V] (signal of positive voltage) and a signal at a level
lower than 0 (zero) [V] (signal of negative voltage) The signal contains
[0026]
On the other hand, the operational amplifier 120, the first load unit 130, and the second load
unit 140 form an inverting amplification circuit. Also, the op amp 120 operating from a single
positive power supply can output a positive voltage signal higher than 0 (zero) [V], but a negative
voltage signal lower than 0 (zero) [V] Can not output. Therefore, as shown in FIG. 3, for example,
during the time t1 t2, the signal of the negative voltage in the reception signal S3 is inverted to a
signal of a positive voltage and amplified as shown in FIG. For example, during time t2t3, the
signal of the positive voltage in the reception signal S3 becomes 0 (zero) [V] without being
inverted to the negative voltage. As described above, in the reception circuit 200, part of the
signal (information) of the reception signal S3 in the amplification signal S4 is missing.
[0027]
FIG. 4 is a graph showing an example of temporal change of the reception signal S1 and the
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amplification signal S2 of the reception circuit 100 shown in FIG. In the graph of FIG. 4, the
vertical axis is voltage and the horizontal axis is time t. With respect to the receiving circuit 200
shown in FIG. 2, the receiving circuit 100 shown in FIG. 1 outputs the received signal S1 from the
signal terminal 12 based on the voltage of the reference terminal 11. When the same ultrasonic
wave as that of the unit 110 is received, as shown in the upper part of FIG. 4, the reception signal
S1 has a waveform with the voltage at the reference terminal 11, that is, Vb [V] as the center of
amplitude. Thus, the reception signal S1 is shifted by the voltage Vb [V] of the reference terminal
11. In this case, the reception signal S1 includes both a signal of a level higher than the voltage
Vb [V] of the reference terminal 11 and a signal of a level lower than the voltage Vb [V] of the
reference terminal 11. Here, in the reception signal S1 output from the signal terminal 12, a
signal having a level lower than the voltage Vb [V] of the reference terminal 11 has a sufficiently
high voltage Vb [V] for the voltage drop in the forward direction of the diode 52. By setting, it
becomes higher than 0 (zero) [V]. Therefore, the reference voltage unit 50 includes the diode 52
whose cathode is connected to ground (GND) and whose anode is connected to the connection
terminal 51, so that the reception signal S1 is set to 0 (zero) [V]. It can be a signal containing
only high level signals (signals of positive voltage).
[0028]
On the other hand, the operational amplifier 20, the first load unit 30, and the second load unit
40 form an inverting amplifier circuit. In addition, the operational amplifier 20 operating with a
single positive power supply can output a positive voltage signal higher than 0 (zero) [V].
Therefore, as shown in FIG. 4, for example, during time t1 t2, a signal of a level lower than
voltage Vb [V] in reception signal S1 is inverted to a signal of a level higher than voltage Vb [V]
and amplified. At the same time, for example, during time t2t3, a signal at a level lower than the
voltage Vb [V] in the reception signal S1 is inverted and amplified to a signal at a level higher
than the voltage Vb [V].
[0029]
(Modification) In the following modifications, the same components as those of the embodiment
described above are denoted by the same reference numerals, and the description thereof will be
omitted. In addition, component parts similar to those of the embodiment described above are
denoted by similar symbols, and the detailed description thereof is omitted. Furthermore,
component parts not shown are the same as those of the embodiment described above.
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[0030]
FIG. 5 is a block diagram for explaining a modification of the receiving circuit 100 shown in FIG.
As shown in FIG. 5, the receiving circuit 100 in the modification differs from the receiving circuit
100 shown in FIG. 1 in that the reference voltage unit 50 further includes another diode 53 in
addition to the diode 52.
[0031]
The diode 52 and the diode 53 are the same or substantially the same diode, and are connected
in series. The anode of the diode 53 is connected to the cathode of the diode 52, and the cathode
of the diode 53 is grounded (connected to ground (GND)). Further, the voltage of the forward
voltage drop of the diode 53 is Vb [V]. Thereby, the voltages of the reference terminal 11 and the
positive input terminal 21 become higher by the voltage of the voltage drop of the diode 52 and
the diode 53 in the forward direction, that is, twice (2 × Vb) Vb [V]. Therefore, the voltage of the
reference terminal 11 and the positive input terminal 21 can be easily made high.
[0032]
In the present modification, an example in which the reference voltage unit 50 includes two
diodes 52 and 53 is shown, but the present invention is not limited to this, and the reference
voltage unit 50 may include three or more diodes.
[0033]
Thus, according to the receiving circuit 100 in the present embodiment, the cathode of the
reference voltage unit 50 is grounded (connected to ground (GND)), and the anode is connected
to the reference terminal 11 and the positive input terminal 21. A diode 52 is included.
Thus, when the voltage (potential) of the ground (GND) is 0 (zero) [V], the voltage (potential) of
the connection terminal 51, that is, the voltages of the reference terminal 11 and the positive
input terminal 21 The voltage Vb [V] for the forward voltage drop of the Here, as shown in FIG.
4, in the received signal S1 output from the signal terminal 12, a signal of a level lower than the
voltage Vb [V] of the reference terminal 11 is a voltage Vb of the voltage drop of the diode 52 in
the forward direction. By setting [V] sufficiently high, it becomes higher than 0 (zero) [V].
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Therefore, the reference voltage unit 50 includes the diode 52 whose cathode is connected to
ground (GND) and whose anode is connected to the reference terminal 11 and the positive input
terminal 21, thereby making the received signal S 1 0 (Zero) It can be a signal including only a
signal (signal of positive voltage) higher than [V]. As a result, the reception signal S1 can be
amplified using the operational amplifier 10 operated by a single positive power supply, and the
amplification signal S2 output from the output terminal 23 of the operational amplifier 20 is the
signal (information) of the reception signal S1. It becomes an amplified signal without omission
(faithfully).
[0034]
Second Embodiment FIG. 6 shows a second embodiment of the receiving circuit according to the
present invention. Note that, unless otherwise stated, the same components as those of the first
embodiment described above are denoted by the same reference numerals, and the description
thereof will be omitted. In addition, component parts similar to those of the first embodiment
described above are denoted by similar symbols, and the detailed description thereof is omitted.
Furthermore, component parts not shown are the same as in the first embodiment described
above.
[0035]
FIG. 6 is a block diagram for explaining the receiving circuit 100A in the second embodiment.
The receiving circuit 100A differs from the receiving circuit 100 according to the first
embodiment in that a power supply E3 is provided instead of the power supplies E1 and E2.
[0036]
The power supply E3 is, for example, a positive voltage source, and is connected to the other
power supply terminal 25 of the operational amplifier 20. The operational amplifier 20 operates
(operates) by the voltage applied from the power supply E3. The power supply E3 is connected to
the power supply terminal 13 of the signal unit 10. The signal unit 10 is driven by the voltage
applied from the power supply E3. Thus, the power supply E3 supplies a voltage capable of
driving both the signal unit 10 and the operational amplifier 20, for example, a voltage in the
range of about 2.7 to 3.6 [V]. As a result, the signal unit 10 and the operational amplifier 20 are
driven by the same power supply E3.
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[0037]
As described above, according to the reception circuit 100A in the present embodiment, the
signal unit 10 is driven by the power supply E3 that applies a voltage to the operational amplifier
20. As a result, the signal unit 10 and the operational amplifier 20 are driven by the same power
supply E3. Thus, the receiving circuit 100A can operate (operate) with a single power supply.
[0038]
Third Embodiment FIGS. 7 and 8 illustrate a third embodiment of a receiving circuit according to
the present invention. Note that, unless otherwise stated, the same components as those in the
first embodiment or the second embodiment described above are denoted by the same reference
numerals, and descriptions thereof will be omitted. In addition, constituent parts similar to those
of the first embodiment or the second embodiment described above are denoted by similar
reference numerals, and the detailed description thereof will be omitted. Furthermore,
component parts that are not shown are the same as in the first embodiment or the second
embodiment described above.
[0039]
FIG. 7 is a block diagram for explaining the receiving circuit 100B in the third embodiment. As
shown in FIG. 7, the receiving circuit 100B differs from the receiving circuit 100 of the first
embodiment and the receiving circuit 100A of the second embodiment in that the reference
voltage unit 50B further includes a resistor 54 in addition to the diode 52. .
[0040]
The diode 52 and the resistor 54 are connected in series. One end of the resistor 54 is connected
to the cathode of the diode 52, and the other end of the resistor 54 is grounded (connected to
ground (GND)). Thereby, the cathode side of the diode 52 is grounded via the resistor 54. Thus,
by the reference voltage unit 50B further including the resistor 54, the reference voltage unit 50
has a resistance while making the voltages of the reference terminal 11 and the positive input
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terminal 21 higher than the voltage (potential) of the ground (GND). The current flowing from
the connection terminal 51 to the ground (GND) can be reduced as compared with the case of the
receiving circuit 100 according to the first embodiment and the receiving circuit 100A according
to the second embodiment not including the
[0041]
Although the cathode side of the diode 52 is grounded via the resistor 54 in the present
embodiment, the present invention is not limited thereto. The anode side of the diode 52 has the
reference terminal 11 and the positive input terminal via the resistor 54. 21 may be connected.
Also, although the example in which the diode 52 and the resistor 54 are connected in series is
shown, the invention is not limited thereto, and the diode 52 and the resistor 54 may be
connected in parallel to each other.
[0042]
(Modification) In the following modifications, the same components as those of the embodiment
described above are denoted by the same reference numerals, and the description thereof will be
omitted. In addition, component parts similar to those of the embodiment described above are
denoted by similar symbols, and the detailed description thereof is omitted. Furthermore,
component parts not shown are the same as those of the embodiment described above.
[0043]
FIG. 8 is a block diagram for explaining a modification of the receiving circuit 100B shown in FIG.
As shown in FIG. 8, the receiving circuit 100B in the modification differs from the receiving
circuit 100B shown in FIG. 7 in that the reference voltage unit 50B includes a variable resistor
55 instead of the resistor 54.
[0044]
The variable resistor 55 is a resistor capable of changing the resistance value to an arbitrary
value within a predetermined range. The diode 52 and the variable resistor 55 are connected in
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series. One end of the variable resistor 55 is connected to the cathode of the diode 52, and the
other end of the variable resistor 55 is grounded (connected to ground (GND)). Thus, the cathode
side of the diode 52 is grounded via the variable resistor 55. As described above, since the
resistor included in the reference voltage unit 50B is the variable resistor 55, the resistance value
of the variable resistor 55 is set to an appropriate value, whereby the ground (GND) can be
transmitted through the connection terminal 51. It is possible to further reduce the current
flowing to the
[0045]
In this modification, the cathode side of the diode 52 is grounded via the variable resistor 55.
However, the present invention is not limited thereto. The anode side of the diode 52 may be
positive with the reference terminal 11 via the variable resistor 55. It may be connected to the
input terminal 21. Also, although the example in which the diode 52 and the variable resistor 55
are connected in series is shown, the invention is not limited thereto, and the diode 52 and the
variable resistor 55 may be connected in parallel to each other.
[0046]
Thus, according to the receiving circuit 100B in the present embodiment, the reference voltage
unit 50B further includes the resistor 54. As a result, while making the voltages of the reference
terminal 11 and the positive input terminal 21 higher than the voltage (potential) of the ground
(GND), the reception circuit 100 and the second embodiment of the first embodiment in which
the reference voltage unit 50 does not include a resistor. The current flowing to the ground
(GND) through the diode 52 can be reduced compared to the case of the receiving circuit 100A
of the embodiment. Thus, the amount of power consumption of the receiving circuit 100B can be
reduced, and energy saving can be achieved.
[0047]
Further, according to the receiving circuit 100B in the present embodiment, the resistor included
in the reference voltage unit 50B is the variable resistor 55. Thus, by setting the resistance value
of variable resistor 55 to an appropriate value, the current flowing through diode 52 to the
ground (GND) can be further reduced. As a result, the power consumption of the receiving circuit
100B can be further reduced, and energy saving can be achieved.
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[0048]
In addition, the configuration of each embodiment described above may be combined or part of
the component parts may be replaced. Further, the configuration of the present invention is not
limited to only the above-described embodiments, and various changes may be made without
departing from the scope of the present invention.
[0049]
DESCRIPTION OF SYMBOLS 10 ... Signal part 11 ... Reference terminal 12 ... Signal terminal 20 ...
Operational amplifier (operational amplifier) 21 ... Positive input terminal 22 ... Negative input
terminal 23 ... Output terminal 30 ... 1st load part 40 ... 2nd load part 50, 50B ... Reference
voltage section 51 ... Connection terminal 52, 53 ... Diode 54 ... Resistor 55 ... Variable resistor
100, 100A, 100B ... Reception circuit E1, E2, E3 ... Power supply
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