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DESCRIPTION JP2013153261

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DESCRIPTION JP2013153261
Abstract: A notification of change of operation data can be maintained at high speed without
changing memory consumption and maintaining the order of change. A parameter change
notification buffer 90 includes a plurality of recording elements 91 corresponding to operation
data, and each recording element 91 is a first pointer 92 for storing an identifier of operation
data changed immediately before the corresponding operation data. And a second pointer 93 for
storing an identifier of the changed operation data next to the corresponding operation data. At
the time of the first change recording to the change notification buffer 90, "first" is stored in the
first pointer 92 of the corresponding recording element, and thereafter it is changed to the first
pointer 92 of the recording element of the changed operation data The identifier of motion data
changed immediately before the operation is stored, the information indicating “last” is stored
in the second pointer 93, and the second pointer 93 of the recording element changed
immediately before the current change operation is stored this time Stores the identifier of the
changed operation data. [Selected figure] Figure 10
デジタルオーディオミキサ
[0001]
The present invention relates to a technique for notifying a change in operation data that
controls an operation of digital signal processing in a digital audio mixer that processes an audio
signal by digital signal processing.
[0002]
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Conventionally, in a remote control system in which a plurality of control devices and a plurality
of sound devices are connected by a network such as Ethernet (registered trademark), the
operation of each sound device is controlled (remote control) from the plurality of control
devices It is known that the operation status can be monitored (remote monitoring).
Such remote control systems are described, for example, in Patent Document 1 and Patent
Document 2.
[0003]
In such a remote control system, when the user of the control device changes the parameter
value (operation data), another device in the system can be notified of the change in the
parameter value. The mechanism of change notification is that notification will be made
immediately when the parameter value is changed (that is, immediacy) and that the change
notification will not be dropped due to the processing status of the notification destination ( That
is, it is required that memory consumption to be prepared for asynchronism and change
notification is small.
[0004]
Of the above requirements, immediacy can be realized relatively easily by wake up of the event
flag. The asynchrony can be realized by saving the change content at the notification source so
that the change notification is not missed. The contents of change to be saved include which
parameter has been changed (the presence or absence of change for each parameter) and the
order of change.
[0005]
As an example of the prior art method of saving changes, a method of applying a FIFO (first in
first out) buffer can be considered. In this case, although the change order is not lost, there is a
problem that the buffer overflows when a large number of parameter value change events occur,
and a notification may be dropped.
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[0006]
Further, as a method of storing the contents of change according to the prior art, a method of
preparing a dirty flag for each parameter can be considered. However, in this case, memory for
dirty flags may cause memory usage to diverge. Also, there is a disadvantage that the parameter
change order is lost. In addition, there is also a disadvantage that the process of searching for
changed parameters is slow.
[0007]
Further, as another method of storing the contents of change according to the prior art, a method
is conceivable in which a memory for parameter value storage having the same contents as the
memory for parameter value storage is prepared and the parameter value change presence or
absence is known by memory comparison. . However, this method has the disadvantage that the
search for the change is slow and that the search order is not clear. In addition, when one
parameter value is continuously changed, if it returns to the value before the change, there is a
risk of overlooking the fact that there is a change operation.
[0008]
JP, 2009-218937, A JP, 2009-218947, A
[0009]
The present invention has been made in view of the above points, and in the change notification
of the parameter value (operation data), the order of the change can be maintained without
divergence of the memory consumption, and all the processing necessary for the change
notification can be performed at high speed. It is an object of the present invention to provide a
digital audio mixer that can be implemented in
[0010]
According to the present invention, an operation data storage unit for storing a plurality of
operation data to which a unique identifier is given, an operation unit for receiving a change
operation of the operation data, and a plurality of recording elements respectively corresponding
to the operation data A change notification buffer for recording the presence / absence of change
for each operation data and the change order thereof as a change record, wherein each of the
recording elements stores an identifier of the operation data changed immediately before the
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corresponding operation data A device having a first pointer and a second pointer storing an
identifier of operation data changed next to corresponding operation data, and when the
operation data is changed by the operation unit, the change notification buffer is changed It is a
change notification buffer updating unit that writes a record, and when the current change
operation is the first change recording to the change notification buffer, The first pointer of the
recording element corresponding to the changed operation data stores information indicating
that the operation data is the first changed operation data at the current point, and after the first
change recording, the current change is made this time The first pointer of the recording element
corresponding to the selected operation data stores the identifier of the operation data changed
immediately before the current change operation, and the second pointer of the recording
element corresponding to the operation data changed this time is stored. Information indicating
that the operation data is the last changed operation data at this time is stored, and is changed to
the second pointer of the recording element corresponding to the operation data changed
immediately before the current change operation. A digital audio mixer including a change
notification buffer updating unit that stores an identifier of operation data.
[0011]
According to the present invention, the parameter change notification buffer comprises a
plurality of recording elements corresponding to the operation data, and each recording element
is a first pointer storing the identifier of the operation data changed immediately before the
corresponding operation data; A configuration having a second pointer for storing the identifier
of the changed operation data next to the corresponding operation data realizes a hybrid data
structure of presence / absence of change for each operation data and a bidirectional list
indicating the change order As a result, the order of changes can be maintained without
diverging memory consumption.
Also, all the processing required for the change notification can be performed at high speed.
[0012]
FIG. 1 is a block diagram for explaining a hardware configuration of a digital audio mixer
according to an embodiment of the present invention.
FIG. 2 is a block diagram illustrating an overview of a mixing algorithm executed by the mixer of
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FIG. 1;
The block diagram which shows the signal processing structural example of an input channel.
The block diagram which shows the signal processing structural example of an output channel.
(A) is a block diagram showing a memory configuration of a current memory, (b) is a tree
diagram explaining a hierarchical structure showing a data configuration of a plurality of
parameter values, and (c) is a tree diagram explaining a specific example of the hierarchical
structure. The block diagram which shows the structure of snapshot memory. The flowchart
which shows the copy / compatibility ensuring processing at the time of snapshot data recall.
The block diagram explaining the specific example of compatibility ensuring operation |
movement. The flowchart which shows the compatibility ensuring process regarding the data
size change of a parameter. The block diagram which shows the structure of a parameter change
notification buffer. The flowchart of a parameter change notification buffer writing process at the
time of a parameter value change. (A)-(d) is an example of a parameter change notification buffer
write-in operation | movement, Comprising: The block diagram explaining operation | movement
added to the last of a list | wrist. FIG. 12 is a block diagram illustrating another example of the
parameter change notification buffer write operation, and the list reconnection operation. FIG. 1
is a block diagram showing a configuration of a mixing system including a digital audio mixer of
the present invention.
[0013]
Hereinafter, as an embodiment of the present invention, a digital audio mixer to which the
editing device according to the present invention is applied will be described with reference to
the attached drawings.
[0014]
In FIG. 1, the digital audio mixer 1 includes a CPU 10 (central processing unit, central processing
unit), a ROM (read only memory, read only memory) 11, a RAM 12 (random access memory,
random access memory), and a display interface 13 (display I / F), operation detection interface
14 (detection I / F), communication interface 15 (communication I / F), signal processing unit 16
(DSP (Digital Signal Processing) unit), effect processing unit 17 (EFX), analog digital conversion A
section 18 (AD converter), a digital / analog converter 19 (DA converter), and a digital / digital
converter 20 (DD converter) are provided.
[0015]
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The CPU 10, the ROM 11, the RAM 12, the display I / F 13, the detection I / F 14, the
communication I / F 15, the DSP unit 16 and the EFX 17 are connected through the
communication bus 21. It can communicate control signals.
The DSP unit 16, the EFX 17, the AD conversion unit 18, the DA conversion unit 19 and the DD
conversion unit 20 are connected to one another via the audio bus 22, and digital audio signals
can be communicated between the units 16 to 20.
[0016]
The CPU 10 executes a program stored in the ROM 11 or the RAM 12 to control the overall
operation of the digital mixer 1.
The ROM 11 is a non-volatile memory that stores various programs executed by the CPU 10 and
various data. The RAM 12 is a volatile memory used for a load area or a work area of a program
executed by the CPU 10. The ROM 11 or the RAM 12 is provided with a current memory for
storing current parameter values (operation data) of a plurality of parameters for controlling the
operation of the acoustic signal processing of the mixer 1.
[0017]
The display 2 displays various information based on a display control signal supplied from the
CPU 10 via the communication bus 21 by various images, character strings, and the like. The
operation unit 3 is a group of operators arranged on the operation panel. The operation unit 3 is
connected to the communication bus 21 via the detection I / F 14. The operation of the operation
unit 3 by the user is detected by the detection I / F 14, and a detection signal is supplied to the
CPU 10 via the bus 21. The user can adjust the value of the parameter corresponding to the
operation by operating the operation unit 3. The CPU 10 updates the parameter value of the
current memory according to the operation of the operation unit 3 and reflects the update result
on the signal processing operation of the DSP unit 16 and EFX 17 or the display of the display 2.
[0018]
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The communication input / output unit 4 (communication I / O) is connected to the
communication bus 21 via the communication I / F 15. The communication I / O 4 is a generalpurpose interface for connecting to another peripheral device, such as a USB (Universal Serial
Bus) terminal. The user can connect peripheral devices (for example, a computer that remotely
controls the mixer 1) to the mixer 1 via the communication I / O 4.
[0019]
The AD conversion unit 18 includes a plurality of input ports for inputting an analog audio signal
from the outside, converts the analog audio signal input from each input port into a digital audio
signal, and outputs the digital audio signal to the audio bus 22. The DA conversion unit 19
includes a plurality of output ports for outputting an analog audio signal to an external device,
converts the digital audio signal supplied from the audio bus 22 into an analog audio signal, and
outputs the analog audio signal from the output port. The DD conversion unit 20 has a plurality
of input / output ports for inputting and outputting digital audio signals between an external
device and the mixer 1, and converts digital audio signals subjected to digital conversion (format
conversion) between the external devices and the mixer 1 Input and output.
[0020]
The DSP unit 16 and the EFX 17 may each be configured by one DSP (Digital Signal Processor),
or may be configured by a plurality of DSPs interconnected by a bus so that the signal processing
is distributed and processed by the plurality of DSPs. It is also good. The DSP unit 16 executes
various microprograms based on an instruction from the CPU 10 to perform digital signal
processing on audio signals of one or more channels supplied from the audio bus 22, and
processes one or more channels after processing. The audio signal is output to the audio bus 22.
The digital signal processing performed by the DSP unit 16 is audio signal routing and acoustic
signal processing. The sound signal processing is adjustment of sound characteristics (volume
level and sound quality), mixing processing of mixing a plurality of audio signals, and the like. In
addition, the EFX 17 executes various microprograms based on the instruction of the CPU 10 to
perform, for example, effect processing such as delay and reverb on the audio signal supplied
from the audio bus 22, and the processed audio signal Are output to the audio bus 22.
[0021]
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FIG. 2 is a block diagram for explaining the outline of the configuration (mixing algorithm) of
acoustic signal processing mainly executed by the DSP unit 16 and the EFX 17. As shown in FIG.
The input patch 23 includes N (N is an arbitrary integer) supply destinations to which a plurality
of input ports provided in each of the AD conversion unit 18 and the DD conversion unit 19 are
provided based on the input patch setting by the user. Connect to input ch24. The input patch 23
is realized by the control of the AD converter 18, the DD converter 19, and the DSP unit 16 by
the CPU 10. In the present specification, “patch” is to assign and connect a supply destination
to a supply source of an audio signal.
[0022]
Each of the N input channels 24 performs various acoustic signal processing on the input audio
signal based on the parameter value group of the current memory, and outputs the processed
audio signal to one or a plurality of MIX buses 25. In addition, CUE on / off can be set for each
input channel 24, and the output signal of the channel on which CUE is on can be supplied to the
CUE bus 26. FIG. 3 shows a detailed configuration example of one input channel 24 in detail. As
one signal processing element, an attenuator (Att) 30, a head amplifier (H / A) 31, a high pass
filter (HPF) 32, a parametric equalizer (PEQ) 33, a gate (Gate) 34, and a compressor (Comp) 35, a
delay (Delay) 36, a volume level (Level) 37, and a pan (Pan) 38. Each of the signal processing
elements 30 to 38 has one or more types of parameters, and performs acoustic signal processing
based on the corresponding parameter values.
[0023]
M (M is an arbitrary integer) MIX buses 25 respectively mix the audio signals of one or more
channels supplied from one or more input channels 24 and mix the audio signals after mixing to
the corresponding output channels 27. Output to Further, the output signal of the CUE bus 26 is
output to the output patch 29 as a Cue / monitor signal through level control and the like by the
Cue / monitor signal control unit 28.
[0024]
Each of the M output channels 27 performs various signal processing on the audio signal
supplied from the corresponding MIX bus 25 based on the parameter value group of the current
memory, and outputs the processed signal to the output patch 29. FIG. 4 shows a configuration
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example of one output channel 27 in detail. An equalizer 40, a compressor 41, a volume level 42,
a balance (Bal) 43, a delay 44, and an attenuator 45 are provided on one output channel 27 as
signal processing elements. Each of the signal processing elements 40 to 45 has one or more
types of parameters, and performs acoustic signal processing based on the corresponding
parameter values. The audio signal subjected to acoustic signal processing at each output ch 27
is output to the output patch 29.
[0025]
The output patch 29 connects the outputs of the respective output channels 27 and the cue /
monitor signal control unit 28 to any one of a plurality of output ports provided in the DA
conversion unit 19 and the DD conversion unit 20, respectively. The operation of the input patch
23 is realized by the control of the AD conversion unit 18, the DD conversion unit 19, and the
DSP unit 16 by the CPU 10.
[0026]
FIG. 5A is a view for explaining the data configuration of the current memory provided in the
ROM 11 or the RAM 12. The current memory 50 stores a plurality of parameter values 51
(operation data group) and management information 52 for managing the data configuration of
the plurality of parameter values 51 as one set. The plurality of parameter values 51 are
substantive values of all the parameters used to control the operation of the acoustic signal
processing shown in FIG.
[0027]
The management information 52 is data for managing the data configuration of a plurality of
parameter values 51 in a hierarchical structure, and collection management information for each
of a plurality of collections corresponding to each of a plurality of nodes (collections) constituting
the hierarchical structure. 53 and parameter management information 56 for each parameter.
[0028]
FIG. 5B is a tree diagram for explaining the hierarchical structure showing the data configuration
of the plurality of parameter values 51. As shown in FIG.
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In FIG. 5B, “parameter 1” 64 to “parameter 4” 67 in the lowermost layer are nodes each
storing one parameter value. “Collection 1” 60 to “Collection 4” 63 indicate a collection that
manages one or more parameters existing under each of them as one group. Since the collection
itself is hierarchized, the data configuration of the plurality of parameter values 51 is managed
by being divided into groups of one or more parameters hierarchized in collection units. For
example, the topmost "collection 1" 60 manages all parameters ("parameter 1" to "parameter 4"),
and the lower "collection 2" 61 is a group of parameters under "collection 1" 60. A part of
"parameter 1" and "parameter 2" is to be managed.
[0029]
Each collection or parameter indicated by one node has an array data structure having one or
more groups of one or more parameters to be managed as one or more array elements. The
number of array elements is indicated by data called array size described later. For example,
when N input channels 24 are assumed to be one collection, the collection of input channels 24
manages one or more parameter groups possessed by the respective signal processing elements
30 to 38 in FIG. Since each of the input channels 24 has one or more types of parameter groups
to be managed as an array element, the array size is N, which is the same number as the N input
channels 24. The total number of desired collections or parameters can be determined by
calculating the array size for each collection that passes from the top-level collection to the
desired collection or parameter. For example, in FIG. 5B, assuming that the array size of
“collection 1” 60 is “3”, the array size of “collection 3” 62 is “4”, and the array size of
“parameter 4” 67 is “5” The total number of "collection 1" 61 is 3 and "collection 3" is 4 for
3 "collection 1", so the total number is 12 and "parameter 4" is 5 for 12 "collection 3" The total
number is 60 because it is one by one.
[0030]
A hierarchical structure based on the management information 52 is organized in accordance
with the configuration of acoustic signal processing shown in FIG. That is, the collections are
respectively set in association with the components constituting the acoustic signal processing.
For example, in an input channel provided with a parametric equalizer (PEQ) and dynamics as a
signal processing element, PEQ has on / off parameters, gain for each frequency band (band) and
Q parameter (Q) as parameters, and dynamics is on / off Assuming a configuration having a
parameter as a parameter, the data configuration of the input channel can be represented by a
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hierarchical structure as shown in FIG. 5 (c). That is, a collection of input channels is placed at
the top level, and a collection of PEQs and a collection of dynamics are placed below it. Under the
PEQ, band collection and on / off parameters are arranged, and under the band, gain parameters
and Q parameters are arranged. Also, on / off parameters are placed under the dynamics.
[0031]
The components of the acoustic signal processing shown in FIG. 2 can be roughly classified into a
collection of input channels 24, a collection of each signal processing element of Att30... Pan 38
arranged therebelow, and each of the signal processing elements. A hierarchy consisting of a
hierarchical structure consisting of parameters, a collection of output channels 27, a collection of
signal processing elements of EQ 40 ... Att 45 arranged below it, and a group of parameters
arranged below each signal processing element The structure represents the data configuration
of the plurality of parameter values 51 as a whole. The array size of the collection of the input
ch24 is N, and the array size of the collection of the output ch27 is M. Each collection of signal
processing elements may have a collection of minor classifications below. In that case, the
management information 52 shown in FIG. 5A includes the collection management information
53 for each component described above, and the parameter management information 56 for
each parameter group disposed below each signal processing element. It will be.
[0032]
In order to specify one desired parameter value 51 based on the above-described hierarchical
structure, it is sufficient to specify all the collections passed through until reaching the parameter
value 51 and array elements for the respective collections passed through. In the specification of
array elements, index numbers are assigned to each array element of the collection, and the
index numbers of the array elements may be specified. Then, as a method of calculating the
address in the memory storing the specified parameter value 51, for example, an offset (relative
address) from the top address of the collection immediately above the collection to the top
address of the collection is given for each collection. It is possible to apply the method of
calculation by combining the relative address and the index number of the array element. As a
method of address calculation, any conventionally known method may be applied.
[0033]
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Referring back to FIG. 5A, in order to obtain the above-described hierarchical structure, each
collection management information 53 has configuration information 54 indicating the
configuration of the corresponding collection and an ID number unique to the configuration of
the collection. The collection ID 55 is included. The configuration information 54 includes data
(child node ID) for specifying a child node of the corresponding collection, and an array size
indicating the number of array elements of the collection. The shape of the entire hierarchical
structure can be specified by referring to the parent-child relationship between the collections
based on the child node ID included in the configuration information 54. Collection management
information 53 indicating a collection (for example, "collection 1") having a node indicating a
collection as a child node has a collection ID 55 of the corresponding collection as a child node
ID. Also, collection management information 53 of a collection (for example, "collection 4")
immediately above the lowest layer node (nodes 64 to 67 indicating parameters) has information
(parameter ID) for specifying a parameter as a child node ID. The collection management
information 53 exists only for one node (collection or parameter), and does not exist for each
array element number of nodes.
[0034]
The configuration of each collection specified by the child node ID and the array size included in
the configuration information 54 corresponds one-to-one with the hierarchical structure (data
configuration) under the collection. For example, when the configuration of an arbitrary
collection or parameter in the hierarchical structure is changed, child nodes in the configuration
information 54 in all the collections existing above the changed collection or parameter
according to the configuration of the collection or parameter The ID (collection ID 55 of the child
node) will be changed. With such a property, by uniquely identifying the configuration of the
collection by the collection ID 55, the hierarchical structure (data configuration) under the
collection can be uniquely identified.
[0035]
The parameter management information 56 for each parameter includes data indicating that
there is no child node, a parameter ID for identifying the parameter type, the data size of the
parameter value, and parameter-type data. Data size is the data size used to represent parameter
values. The parameter type data is data specifying the method of expressing the value of the
parameter in any of four types of parameter types: signed integer type, unsigned integer type,
character string type, and floating point type. All parameters are classified into any parameter
type of the above type according to the representation system of the value. The signed integer
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type is a parameter type that represents a parameter value by an integer value with plus and
minus signs (+/−). The unsigned integer type is a parameter type that represents parameter
values by positive and negative unsigned integer values. The floating point type is a parameter
type in which a parameter value is represented by a numerical value including decimals. Further,
the character string type is a parameter type in which parameter values are represented by
character strings such as alphabetic characters, for example.
[0036]
Next, snapshot data will be described. The mixer 1 stores (stores) the operation state of the mixer
1, that is, the plurality of parameter values 51 of the current memory 50 in the memory as
snapshot data, reads the stored snapshot data into the current memory, A snapshot function is
provided to collectively reproduce the operating state of the mixer 1 based on the read snapshot
data. Such snapshot function is conventionally known.
[0037]
FIG. 6 shows a data configuration example of snapshot memory for storing snapshot data. The
snapshot memory is provided in an appropriate memory (the ROM 11 or the RAM 12 in FIG. 1,
an external storage device not shown, etc.). A plurality of snapshot data 70 ("snapshot 1",
"snapshot 2", etc.) can be stored in the snapshot memory. Serial numbers are assigned to the
plurality of snapshot data 70.
[0038]
One snapshot data 70 is composed of a plurality of parameter values 71 and its management
information 72. The plurality of parameter values 71 and the management information 72
correspond to the plurality of parameter values 51 and the management information 52 shown
in FIG. 5A, respectively. That is, the management information 72 includes a plurality of collection
management information 73 and a plurality of parameter management information 76, and each
collection management information 73 includes configuration information 74 indicating the
configuration of the collection, and the configuration of the collection. And a unique collection ID
75, and each parameter management information 76 includes data indicating that there is no
child node, data size of parameter value, and parameter type data. Then, based on the
management information 72, the data configuration of the plurality of parameter values 71
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included in the snapshot data 70 can be divided into groups of collection units and managed with
a hierarchical structure similar to the hierarchical structure shown in FIG. The configuration of
each collection can be uniquely identified by the corresponding collection ID 75.
[0039]
When a user's store instruction is issued, the CPU 10 writes the plurality of parameter values 71
stored in the current memory 50 and the management information 72 in the snapshot data
memory as new snapshot data 70. As a result, it is possible to save, as snapshot data 70, a
plurality of parameter values 71 having the same data configuration as the current memory 50
when store instruction is given, and management information 72 for managing the data
configuration in a hierarchical structure.
[0040]
When the user issues a recall instruction, the CPU 10 overwrites and copies the plurality of
parameter values 71 of the snapshot data 70 instructed to be recalled onto the plurality of
parameter values 51 of the current memory 50. Here, when the data configuration is identical
between the snapshot data 70 of the copy source and the current memory 50 of the copy
destination, the plural parameter values 71 of the snapshot data 70 are batched in the current
memory 50. You can copy over. However, when the data configuration is different between the
snapshot data 70 and the current memory 50 of the copy destination, it is necessary to ensure
the compatibility of the data configuration of the snapshot data 70 and the current memory 50.
[0041]
As described above, the data configurations of the current memory 50 and the snapshot data 70
are managed in collection units in a hierarchical structure based on the management information
52 and 72. That is, when there is a change in the data configuration between the current
memory 50 and the snapshot data 70, the configuration of the collection is changed between the
current memory 50 and the snapshot data 70 according to the contents of the change. Ru.
Specifically, the change of the configuration of the collection is an increase or decrease of the
collection (referred to as an increase or decrease of the collection) in either the current memory
50 or the snapshot data 70, a change of the array size of the collection, the current memory 50
or a snap It appears in the management information 52, 72 as increase or decrease of parameter
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(increase or decrease of parameter) in any one of the shot data 70, change of array size of
parameter, change of data size of parameter or change of parameter type of parameter.
[0042]
In the mixer 1 of this embodiment, when recalling the snapshot data 70, based on the
management information 74 of the snapshot data 70, the difference between the configurations
of the collection is judged on a collection basis to automatically determine the compatibility
problem. A plurality of parameter values 71 are overwritten and copied to the current memory
50 while solving the problem.
[0043]
FIG. 7 is a flowchart of the process of overwriting and copying a plurality of parameter values 71
from the snapshot data 70 to the current memory 50.
The process of FIG. 7 is executed by the CPU 10 when the user issues a recall instruction of the
snapshot data 70. The CPU 10 sets one of a plurality of collection management information 73
stored as the management information 72 of one snapshot data 70 instructed to be recalled
according to a user's recall instruction as a processing target, and performs the process The
process of FIG. 7 is performed for one collection of objects. Collections to be processed are
specified in order from the topmost collection in the hierarchical structure.
[0044]
In step S1, the CPU 10 determines whether the configuration of the collection to be processed
matches between the snapshot data 70 and the current memory 50 based on the collection ID 75
of the collection to be processed.
[0045]
If the management information 52 of the current memory 50 includes the same collection ID 55
as the collection ID 75 of the collection to be processed, it is determined that the configuration of
the collection to be processed matches between the snapshot data 70 and the current memory
50 it can.
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If the configurations of the collections match (YES in step S1), the CPU 10 overwrites and copies
one or more parameter values 71 under the collection to be processed on the current memory
50 in step S2, and ends the processing.
[0046]
If the configuration of the collection to be processed does not match between the snapshot data
70 and the current memory 50 (NO in step S1), the CPU 10 selects one or more parameters
under the collection to be processed in step S3. , It is checked whether there is a parameter that
exists only in the snapshot data 70. As a result, it is possible to determine whether or not there is
a collection in the current memory 50 of the copy destination that has the same child node as the
collection to be processed but differs in only the array size. This determination can be made
based on whether or not the current memory 50 has a collection having a child node ID that
matches the child node ID included in the configuration information 74 of the collection to be
processed. Therefore, the determination process of the said step S3 can also be performed by
simple ID comparison.
[0047]
When there is no parameter that exists only in the snapshot data 70 (NO in step S3), in other
words, the difference in the configuration of the collection to be processed between the snapshot
data 70 and the current memory 50 relates to the change in array size If it is, in step S4, the CPU
10 compares the array sizes of the collection to be processed and the configuration information
54 and 74 of the corresponding collection in the current memory 50 and At the same time, one
or more parameter values subordinate to the processing target collection are overwritten and
copied to the current memory 50 (in other words, only a part of the array element is
overwritten). This process can ensure compatibility regarding the change of the array size.
[0048]
On the other hand, if there is a parameter that exists only in the snapshot data 70 (YES in step
S3), in other words, if a collection of the same type exists in the snapshot data 70 and the current
memory 50, the snapshot data 70 and the current memory 50 It can be determined that the
difference in the configuration of the collection to be processed between and is related to the
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increase or decrease of the collection. In that case, the CPU 10 ends the process related to the
processing target collection without performing copying in units of the processing target
collection (step S5).
[0049]
When processing for one collection is complete, set the next collection to be processed. At this
time, when the process is ended without copying in the step S5, a child node (subordinate
collection) of the collection which is not copied is set as a process target, and the process of FIG.
7 is repeated recursively. When parameters are copied in step S2 or S5, the process may be
skipped for all collections below the collection.
[0050]
FIGS. 8A to 8C are block diagrams for explaining a specific example of the operation of recalling
the snapshot data 70 into the current memory 50. FIG. In FIG. 7, each block represents a
collection, "A" is the top collection, "AA" and "AB" are subordinate collections of "A", "AAA", "AAB"
and "AAC" are " The subordinate collections of "AA", "ABA" and "ABB" are subordinate collections
of "AB".
[0051]
In the example of FIG. 8, the collection “AAB” is included in the snapshot data 70 but not
included in the current memory 50. That is, the current memory 50 is different from the
snapshot data 70 in that the hierarchical collection “AAB” is reduced. In this case, as shown in
(b), with regard to “AA” and “A” above “AAB”, since the configuration of the collection is
changed between the current memory 50 and the snapshot data 70, the compatibility It is
necessary to secure On the other hand, as shown in (c), “AB”, “ABA”, “ABB”, “AAA” and
“AAC” are compatible since the configuration does not change between the snapshot data 70
and the current memory 50. Overwrite copy processing can be performed without the process of
securing the nature.
[0052]
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17
The operation of ensuring compatibility / copying for each collection shown in FIG. 8 will be
described according to the process of FIG. 7 as follows. First, in the case of the uppermost "A",
steps S1 and S3 are branched to NO, and the process is ended without performing copying in
step S4. Subsequently, in the case of "AA", steps S1 and S2 are branched to NO, and the process
ends without performing copying in step S4. Then, in the case of "AAB", steps S1 and S3 are
branched to NO, and the process is ended without performing copying in step S4. That is, one or
more parameter values under “AAB” not in the current memory 50 are not copied.
[0053]
On the other hand, for "AAA" and "AAC" having the same configuration as that of the current
memory 50, step S1 is branched to YES, and one or more parameter values of the subordinate
are overwritten and copied to the current memory 50 in step S2. it can. In addition, since the
configuration of the lower collection of the collection "AB" is identical between the snapshot data
70 and the current memory 50, branch step S1 to YES and, in step S2, one or more parameters of
the subordinate Values can be collectively copied over in the current memory 50. As for "ABA"
and "ABB" under "AB", the process can be skipped because one or more parameter values under
the "AB" have already been copied. Therefore, the processing on this branch can be ended only
by the copy of "AB".
[0054]
To summarize the above description, the data configuration is compared based on the collection
ID in units of collections in a hierarchical structure, and (1) for a matching collection of data
configurations between the snapshot data 70 and the current memory 50, One or a plurality of
parameter values under the collection are collectively overwritten in the current memory 50 and
copied, and the process is ended (step S2). (2) The process of comparing the data configuration
for the lower-level collection of the collection is not recursively copied without copying the
inconsistent data configuration collection between the snapshot data 70 and the current memory
50 (step S5). (3) If there is a data configuration mismatch between the snapshot data 70 and the
current memory 50 but there is a homogeneous collection (the array size is changed), the array
size is adjusted to the smaller one. Then, one or a plurality of parameter values under the
collection are collectively overwritten and copied in the current memory 50, and the process is
ended (step S4).
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18
[0055]
Therefore, the comparison of the data configuration on a collection basis is sufficiently fast since
the simple ID comparison between the management information 52 and 72 is sufficient. If the
configuration of the collection matches, batch copying can be performed, so the processing when
the data configuration matches on a collection basis is sufficiently accelerated. In addition, since
the processing when there is a change in the array size only changes the size of the data to be
copied (the number of array elements), complicated processing is unnecessary, and the
processing can be sufficiently speeded up. Then, only when the configurations of the collections
do not match, the compatibility ensuring process is recursively called for the hierarchical
collection, so that the compatibility ensuring process operates only in the minimum necessary
places. It has become. This can further speed up the process. That is, by performing copying and
compatibility ensuring processing in a collection unit having a hierarchical structure, the
operation of compatibility ensuring processing can be performed only at the minimum necessary
places, and data can be batch copied for collections that are not necessary. It is possible to speed
up memory copy processing that requires compatibility. Then, since the data configuration of the
collection unit is checked based on the management information 52 and 72, the converter is
unnecessary and it is not affected by the excess of past assets and the like. Therefore, the process
of copying a plurality of parameter values with another data configuration can be performed by a
simple and high-speed process without the need for time and effort.
[0056]
In the above explanation, only the operation for ensuring compatibility regarding increase /
decrease of collection and change of array size for each collection has been described. The
increase and decrease of parameters and the change of array size for each parameter can also be
handled by the processing of FIG. That is, when the lowermost node (symbols 60 to 67 in FIG.
5B) is set as a processing target, the CPU 10 checks the parameter IDs of the parameter
management information 56 and 76 in step S1 and sets the same type The presence or absence
of a parameter is determined, and if the same type of parameter exists (step S1), all values
(parameter values of all array elements) of the parameter are overwritten and copied to the
current memory 50 in step S2. When only the array size of the parameters is different (step S1 is
branched to NO and step S3 is branched to NO), the parameter value of the parameter is
overwritten and copied to the current memory 50 in accordance with the smaller array size (that
is, Copy only part of the array element). If the corresponding ID parameter does not exist (NO in
step S1), that is, if the parameter changes between the snapshot data 70 and the current memory
50, the parameter is not copied (step S2). Since the management information of the lowermost
node has information indicating that there is no child node, the CPU 10 can determine that it is
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not necessary to check the lower layer.
[0057]
When parameters are targeted, in addition to the change of the array size, the change of the data
size of the parameter or the change of the parameter type of the parameter can be considered as
the reason that the parameter ID does not match. Therefore, in the case where parameters are
targeted, in addition to the processing of FIG. 7, compatibility ensuring processing regarding
change of data size of parameter or change of parameter type of parameter is also performed.
FIG. 9 is a flowchart showing a process for ensuring compatibility regarding change of data size
of parameter or change of parameter type of parameter.
[0058]
In step S6, the CPU 10 checks the data size and parameter type of the parameters included in the
configuration information 54 corresponding to the processing target collection. If the snapshot
data 70 and the current memory 50 of the current memory have the same parameter type and
the same data size (YES in step S6), the CPU 10 determines the parameters corresponding to the
collection in step S7. The value is copied as it is from the snapshot data 70 to the current
memory 50 of the current memory, and the process related to the processing target collection is
ended.
[0059]
If the parameter is the same parameter type and only the data size differs between the snapshot
data 70 and the current memory 50 of the current memory (NO1 in step S6), the CPU 10 adds a
signed parameter type in step S8. It is checked whether it is an integer type, an unsigned integer
type, a character string type, or a floating point type, and one of the processes in steps S9 to S11
is performed according to the parameter type.
[0060]
(A) If the parameter type is a floating point type, the CPU 10 ends the processing without
copying the parameter value corresponding to the collection to be processed in step S9.
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20
(B) If the parameter type is signed or unsigned integer type, the CPU 10 matches the parameter
value corresponding to the processing target collection with the smaller data size in step S10,
and uses snapshot data from the current memory Copy over and finish the process. (C) If the
parameter type is a string type, in step S11, the CPU 10 matches the parameter value
corresponding to the collection to be processed with the smaller data size, that is, a string that
overflows from the size of the copy destination And overwrite-copy from snapshot data to the
current memory, and the process ends.
[0061]
In addition, when the parameter data and the data size of the parameter differ between the
snapshot data 70 and the current memory 50 of the current memory, or when at least the
parameter data differs (NO 2 in step S 6), the CPU 10 processes It is assumed that the process
ends without copying the parameter values corresponding to the target collection.
[0062]
According to the process of FIG. 9 described above, it is possible to perform the process of
ensuring the compatibility according to the parameter type in changing the data size of the
parameter.
Therefore, even when the data size of the parameter is changed, it is possible to copy the
parameter value of the snapshot data 70 to the current memory 50 while ensuring compatibility
as much as possible.
[0063]
Next, when the parameter value 51 of the current memory is changed, a configuration for
notifying of the parameter value change will be described. As well known, the user of the mixer 1
can change the desired parameter value 51 in the current memory 50 of the current memory
using the operation unit 3. The CPU 10 specifies the parameter of the operation target according
to the operation of the operation unit 3 and changes the specified parameter value according to
the operation amount. The mixer 1 changes the parameter to record the content of the change in
order to notify the change of the parameter value to some notifying party (application program
or external device) when the parameter value (operation data) is changed. The notification buffer
11-04-2019
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90 is provided in a memory (for example, the RAM 13). Further, parameter numbers are assigned
to the plurality of parameter values 51 by serial numbers as unique identifiers for the individual
parameter values. As shown in FIG. 5A described above, the management information 52 of the
current memory 50 includes parameter numbers 57 assigned to the plurality of parameter values
51.
[0064]
FIG. 10 shows a configuration example of the parameter change notification buffer 90. In FIG.
10, the parameter change notification buffer 90 includes the same number of recording elements
91 as the plurality of parameter values 51 stored as one current memory 50 of the current
memory. In FIG. 10, ten recording elements 91 are shown for the convenience of illustration and
explanation. Each recording element 91 of the parameter change notification buffer 90 is
assigned the parameter number 57 of the corresponding parameter.
[0065]
Each recording element 91 includes two pointers of “* prev” 92 and “* next” 93. “* Prev”
92 is a pointer (first pointer) for storing the parameter number of the parameter (“one
before”) whose parameter value has been changed one view from the recording element 91. “*
Next” 93 is a pointer (second pointer) that stores the parameter number of the parameter
(“one after”) whose parameter value has been changed next to the recording element 91. Also,
“* prev” 92 of the recording element 91 whose value is first changed at a certain point stores
information “first” indicating that the parameter is the first changed parameter at this point.
Also, in the “* next” 93 of the recording element 91 whose value has been changed last at the
present time, information “last” indicating that the parameter has been changed last at the
present time is stored. Note that “* prev” 92 and “* next” 93 of parameters that have not
been changed have no value.
[0066]
According to the structure of the parameter change notification buffer 90 described above, in the
recording element 91 in which “* prev” 92 and “* next” 93 have any value (parameter
number, “first” or “last”). It is possible to determine that the corresponding parameter is
“with parameter value change” and the other parameter is “without parameter value
11-04-2019
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change”. Further, based on the data of “* prev” 92 and “* next” 93 of each recording
element 91, it is possible to create a bidirectional list indicating the order of changing parameter
values. That is, by tracing the parameter number of “* next” 93 from a parameter having
“first”, it is possible to obtain a list of parameter values in the order of change (the order of
change time from old to new). On the other hand, by tracing the parameter number of "* prev" 92
from the parameter having "last", it is possible to obtain the list in the reverse order (order of
change time from new to old). That is, the parameter change notification buffer 90 has a hybrid
data structure of a parameter number group whose parameter value has been changed and a
bidirectional list indicating the change order. With this structure, the change notification buffer
90 can record, for each parameter value, the presence / absence of change and the change order
thereof as a change record.
[0067]
FIG. 11 is a flowchart of the process of updating the parameter change notification buffer 90.
When the parameter value change is performed by the operation of the operation unit 3 by the
user, the CPU 10 executes the process of FIG. FIGS. 12 (a) to 12 (d) are specific examples of the
operation of updating the parameter change notification buffer 90 of FIG. 10, where the
parameter values are changed in the order of parameter numbers 2, 4, 7, and 8. It is assumed
that the parameter number whose value has been changed is added to the bidirectional list of the
parameter change notification buffer 90 on an assumption.
[0068]
In step S12, the CPU 10 checks, based on the parameter change notification buffer 90, whether
there is a parameter whose parameter value has already been changed. As described above,
whether or not there is a recording element 91 in which data is written in “* prev” 92 and “*
next” 93 (that is, in the bidirectional list) It can be judged by the presence or absence of
connected parameters.
[0069]
When there is no parameter being changed in the parameter change notification buffer 90 at the
time when the parameter value is changed (NO in step S12), the CPU 10 changes the parameter
(target parameter) for which the current parameter value is changed in step S13. Change “*
11-04-2019
23
prev” 92 of) to “first” and change “* next” 93 to “last”. For example, as shown in FIG.
12A, when the parameter value of parameter No. 2 is changed with no parameter already
changed in the parameter change notification buffer 90, "* prev" 92a of parameter No. The
“first” is set to “,” and the “last” is set to the “* next” 93 a.
[0070]
On the other hand, when there is a parameter that has already been changed in the parameter
change notification buffer 90 when the parameter value is changed (YES in step S12), in step
S14, the CPU 10 changes the parameter whose parameter value is changed this time ( It is
checked whether the target parameter is already changed in parameter value, that is, whether
data is written in the target parameter “* prev” 92 and “* next” 93. If the target parameter
has not been changed yet (NO in step S14), the CPU 10 performs processing for adding the
target parameter to the bidirectional list of the parameter change notification buffer 90 in step
S15.
[0071]
The addition process of step S15 is as follows. In the parameter change notification buffer 90,
the CPU 10 selects the parameter whose “* next” 93 is “last” (the parameter currently
connected to the end of the bidirectional list at the current moment, which is called “last
parameter” for convenience) And change the "* next" 93 of the specified last parameter from
"last" to the number of the target parameter, and change the "* prev" 92 of the target parameter
to the parameter number of the last parameter, and , Change its "* next" 93 to "last". As a result,
the target parameter is added to the end of the bidirectional list (it becomes a new last
parameter).
[0072]
A specific example of the operation of adding the target parameter to the tail end of the
bidirectional list will be described with reference to FIGS. 12 (b) to 12 (d). When the parameter
value of parameter No. 4 is newly changed from the state of FIG. 12A, as shown in FIG. 12B, “*
next” 93a of parameter No. 2 which is the last parameter is changed to “4”. At the same time,
the "* prev" 92b of the parameter number 4 which is the target parameter is changed to "2", and
the "* next" 93b is changed to "last". Subsequently, when the parameter value of parameter No. 7
11-04-2019
24
is newly changed from the state of (b), as shown in (c), “* next” 93b of parameter No. 4 which
is the last parameter is changed to “7” At the same time, "* prev" 92c of parameter No. 7
which is the target parameter is changed to "4", and "* next" 93c is changed to "last".
Furthermore, when the parameter value of parameter No. 8 is newly changed from the state of
(c), as shown in (d), change “* next” 93 c of parameter No. 7 which is the last parameter to
“8”. At the same time, “* prev” 92 d of parameter number 8 which is the target parameter is
changed to “7”, and “* next” 93 d is changed to “last”.
[0073]
By the above operation, it is possible to create an interactive list in which the changed
parameters (parameter numbers 2, 4, 7, 8) are connected in the order of the change. That is, by
connecting "* next" from the parameter number 2 of "first", it is possible to obtain a list in which
new parameters are traced from parameters whose change order is old. On the other hand, by
connecting “* prev” from the “last” parameter number 8, a list can be obtained in which the
change order follows the old parameters from the new parameters.
[0074]
Returning to FIG. 11, if the target parameter has already been changed (NO in step S14), the CPU
10 changes again “* prev” 92 and “* next” 93 of the target parameter in step S16. In other
words, the parameters already connected to the bidirectional list are reconnected to the end.
[0075]
In step S16, first, the CPU 10 stores the parameter number of the target parameter in “* next”
93 (this is called “preceding parameter”) and the target parameter in “* prev” 92. Specify
the parameter that stores the parameter number of the parameter (this is called "one parameter
after") and the parameter (the "last parameter" mentioned above) that stores "last" in "* next" 93
Do.
Next, the CPU 10 changes “* next” 93 of the identified one previous parameter to the
parameter number of the identified one subsequent parameter, and changes the value of the
identified one subsequent parameter. “* Prev” 92 is changed to the parameter number of the
immediately preceding specified parameter, and “* next” 93 of the specified last parameter is
changed to the parameter number of the target parameter. Then, the CPU 10 changes “* prev”
11-04-2019
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92 of the target parameter to the parameter number of the last parameter, and changes “*
next” 93 to “last”. Thereby, the target parameter can be rejoined as the new last of the
bidirectional list.
[0076]
As a specific example of the operation of reconnecting the target parameter to the tail end of the
bidirectional list, the parameter of the parameter number 4 in the state of FIG. 12 (d) (state
where the parameter numbers 2, 4, 7, 8 are connected in numerical order). The operation when
the value is changed again will be described with reference to FIG. In this case, with respect to
the parameter number 4 which is the target parameter, the parameter number 2 is the
“preceding parameter”, and the parameter number 7 is the one subsequent parameter. Also,
parameter number 8 is the last parameter. The "* next" 93a of the parameter number 2 which is
the previous parameter is changed to "7", and the "* prev" 92c of the parameter number 7 which
is the next parameter is changed to "2" . Then, while changing the last parameter “* next” 93 d
to “4”, change the parameter number 4 “* prev” 92 b to “8” and change the “* next”
93 b to “last” Do.
[0077]
By the above operation, the points connected in the order of parameter numbers 2, 4 and 7
before the change are changed to a list connected in the order of parameter numbers 2 and 7,
and parameter number 4 is a new bidirectional list. It is reconnected to the end. As a result, as
shown in FIG. 13, a list of parameter numbers 2, 7, 8 and 4 in the order of old parameters to new
parameters and parameter numbers 4, 8, 7 and 2 in the reverse order can be obtained.
[0078]
When there is a parameter change operation, the mixer 1 indicates that the parameter change
has been performed for the notification party (application program or external device) of the
parameter change notification together with the above-described updating process of the
parameter change notification buffer 90 I will give notice of. This change notification is
performed by a simple mechanism using an event flag. The content notified by the event flag is
only that the parameter has been changed. The notification party of the parameter change
notification can inquire the content of the change notification at any time. The mixer 1 can
11-04-2019
26
respond to the query with reference to the parameter change notification buffer 90 described
above, with the contents of the change. Specifically, in response to the inquiry, the CPU 10 of the
mixer 1 refers to the parameter change notification buffer 90 to notify the parameter number at
the top of the list. The CPU 10 of the mixer 1 removes the parameter notified to the notification
counterpart from the list of the parameter change notification buffer 90 (clears the record of the
storage element 91). When the notified parameter is removed from the list of the parameter
change notification buffer 90, the parameter of the parameter number stored in "* next" 93 of
the removed parameter storage element 91 becomes the top of the list (the Element 91 "* prev"
92 is updated "first"). That is, the CPU 10 of the mixer 1 notifies the notified party of which
parameter values have been changed and in what order by notifying the parameter numbers in
the list order of the parameter change notification buffer 90 in response to the inquiry. Can. The
information of one parameter obtained from the parameter change notification buffer 90 is only
“parameter number”, and another type of conversion is required to know the address of the
parameter value in the current memory 50 and the value after the change.
[0079]
According to the embodiment described above, the parameter change notification buffer 90
includes the plurality of recording elements 91 corresponding to the parameter values, and each
recording element 91 stores the changed parameter number immediately before the
corresponding parameter value. A configuration having a first pointer and a second pointer for
storing a parameter number changed next to the corresponding parameter value, a hybrid data
structure of presence / absence of change for each parameter value and a bidirectional list
indicating the change order , And the change order can be kept without the memory
consumption diverging. Also, all the processing required for the change notification can be
performed at high speed.
[0080]
When the mixer 1 has the parameter change notification buffer 90 described above, for example,
in a mixing system including a plurality of devices, information on parameter value change
operations (which parameter values have been changed in what order) can be Can be notified to
FIG. 14 is a configuration example of a mixing system 100 including the mixer 1. The mixing
system 100 includes two mixers 1 and 101 (“mixer 1” and “mixer 2”), an audio input /
output device 102 (“I / O”), and a signal processing engine 103 (“engine”) Is a system in
which two personal computers 104 and 105 (“PC1” and “PC2”) are connected via a
network 106, and these devices 1, 101, 102, 103, 104, and 105 are input in cooperation with
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one another. The signal processing of the received audio signal is performed to output the
processing result. In the mixing system 100, the mixer 1 can notify the other devices 101 to 105
in the system of the parameter value change by the user. The notification is, as described above,
that the order of change is held without the memory consumption diverging, and all the
processing necessary for the change notification can be performed at high speed.
[0081]
The copy / compatibility ensuring process described above with reference to FIGS. 7 and 9
assumes the case where the snapshot data 70 stored in the snapshot memory of the mixer 1 is
overwritten and copied onto the current memory 50. . As another embodiment, for example,
when writing snapshot data created by the personal computers 104 and 105 (“PC1” and
“PC2”) in the mixing system 100 into the current memory 50 of the mixer 1, for example,
When overwriting a plurality of parameter values in the current memory 50 of the mixer 1 from
the above apparatus, the copy / compatibility ensuring process described with reference to FIGS.
7 and 9 can be applied.
[0082]
1 digital audio mixer 2 display unit 3 operation unit 10 CPU 11 ROM 12 RAM 16 signal
processing unit 50 current memory 51, 71 parameter value 52, 72 management information 53,
73 collection management information, 54, 74 configuration information, 55, 75 collection ID,
56, 76 parameter management information, 70 snapshot data, 90 parameter change notification
buffer, 91 recording elements, 92, 93 pointers
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