close

Вход

Забыли?

вход по аккаунту

?

DESCRIPTION JP2015507877

код для вставкиСкачать
Patent Translate
Powered by EPO and Google
Notice
This translation is machine-generated. It cannot be guaranteed that it is intelligible, accurate,
complete, reliable or fit for specific purposes. Critical decisions, such as commercially relevant or
financial decisions, should not be based on machine-translation output.
DESCRIPTION JP2015507877
Abstract: A differential microphone with an improved bias scheme and a well-defined common
mode output voltage is connected to an amplifier with an amplification stage and a common
mode feedback circuit. This amplifier is in a feedback configuration. [Selected figure] Figure 1
Differential microphone and method of driving differential microphone
[0001]
The present invention relates to a differential microphone and a method of driving the
differential microphone. The invention further relates to the interface means of a differential
condenser microphone, for example a MEMS (MEMS = Micro-Electro-Mechanical Systems) or
ECM (ECM = electret condenser) microphone.
[0002]
A microphone, such as a MEMS microphone, comprises a perforated backplate and a flexible
membrane. The back plate and the membrane serve as electrodes of a capacitor. The received
acoustic signal induces membrane vibration. The acoustic signal can be converted into an
electrical signal by means of the correspondingly induced oscillation of the capacitance. In order
to improve the signal quality of the MEMS microphone, a double backplate microphone or a
double membrane microphone can be formed. In a double backplate microphone, the membrane
is disposed between two porous backplates. In a double membrane microphone, a porous back
11-04-2019
1
plate is disposed between two flexible membranes. In each case, a microphone with two
capacitors is obtained, provided with a differential output port. The differential port consists of
two terminals, each having approximately the same absolute value and providing a voltage or
current of opposite polarity. If the signals are transmitted through differential signal ports or
differential signal paths, common mode variations can be easily removed.
[0003]
Although microphones with differential ports provide better signal quality, their use is not yet
very commercialized, unlike simple microphones with a single capacitor as an acousto-electrical
converter Therefore, the method of interface with such a microphone has not been worked so
hard yet. For this reason, there are still unsolved problems regarding reception and amplification
of signals from differential microphones.
[0004]
Microphones that output differential signals are disclosed in Patent Documents 1, 2, 3 and so on.
[0005]
A differential MEMS microphone electrically comprises two capacitors, the electrodes of which
must be biased.
An interface circuit connected to these electrodes may be provided to supply the bias voltage of
the capacitor. Conventionally, bias is performed by connecting a resistive element having a large
resistance value between these electrodes and the ground.
[0006]
Conventionally, reception and amplification of differential microphone signals such as bias of
differential microphone, gain setting of amplifier, influence of parasitic capacitance at interface
connection point, capacitive impedance conversion of differential microphone, low noise and low
cutoff frequency There were problems with obtaining amplifier response, etc.
[0007]
11-04-2019
2
The signal quality depends on the quality of the bias voltage of the acoustic capacitor.
Furthermore, this signal quality depends on the quality of the common mode output voltage.
What is needed is a differential microphone with an improved bias voltage of the microphone's
acoustic capacitor, a well-defined common mode output voltage, and a method of driving such a
microphone.
[0008]
U.S. Pat. No. 4,757,545 U.S. Pat. No. 2008/0310655 A1 U.S. Pat. No. 2010/254544 A
[0009]
Accordingly, it is an object of the present invention to provide a differential microphone capable
of processing differential signals from the microphone's acoustic capacitor, which differential and
stable bias of the well-defined capacitor electrode. A voltage can be provided to provide a welldefined common mode output voltage.
It is also an object of the invention to amplify the signal of this differential microphone with a
well defined gain, ie to provide a well defined gain.
[0010]
To this end, the invention provides a differential microphone according to the independent
claims and a method of driving such a microphone. The dependent claims describe preferred
embodiments of the invention.
[0011]
The differential microphone comprises a first microphone electrode, a central microphone
electrode, and a second microphone electrode. The microphone further comprises a differential
11-04-2019
3
output port and a differential amplification stage. The amplification stage has a differential input
port and a differential output port connected to the output port of the microphone. The
microphone further comprises a common mode feedback circuit having a differential output port,
which is connected to the output port of the microphone.
[0012]
This common mode feedback circuit provides a well defined common mode output voltage.
[0013]
This microphone provides an interface means for the differential microphone by means of the
electrical circuit according to the invention.
This microphone is used for amplification of differential microphone signal such as bias of
differential microphone, gain setting of amplifier, influence of parasitic capacitance at interface
connection point, capacitive impedance conversion of differential microphone, low noise and low
cutoff frequency amplifier Resolving the conventional problems of receiving and amplifying
differential microphone signals, such as obtaining responses.
[0014]
Thus, the microphone comprises an amplifier connected to the microphone electrode which
supplies a bias voltage to the capacitor, and a common mode voltage output to a further circuit
processing the amplified electrical signal in which the received acoustic signal is encoded. Have.
[0015]
From these things, connection means the electrical connection between circuit elements here.
[0016]
In one embodiment, the first terminal of the differential input port of the amplifier is connected
to the first microphone electrode and the second terminal of the differential input port of the
amplifier is 2 connected to the microphone electrode.
[0017]
11-04-2019
4
The improved microphone solution can be based on an assembly in which the microphone
electrodes are electrically coupled to a metal-oxide-semiconductor (MOS) integrated circuit.
[0018]
In one embodiment, the amplification stage has a control port and a common mode feedback
circuit is connected to the control port of the amplification stage.
[0019]
In one embodiment, the differential microphone further comprises a first resistive element and a
second resistive element.
The first resistance element is connected between the first terminal of the output port and the
first terminal of the input port.
The second resistive element is connected between the second terminal of the output port and
the second terminal of the input port.
These first and second resistive elements are part of the feedback circuit of the amplifier.
[0020]
Furthermore, first and second capacitive elements may be connected in parallel with the
feedback resistive element.
Thus, the microphone includes capacitive feedback, as the feedback circuit is connected to an
acoustic capacitor, the condenser of the microphone being considered as part of the feedback
circuit.
[0021]
11-04-2019
5
In one embodiment, these resistive elements comprise a first diode and a second diode connected
in parallel and opposite to the first diode.
The direction of this second diode may be opposite to that of the first diode.
[0022]
These resistive elements have a resistance RF greater than 10 GΩ. This condition is necessary to
ensure that the resistance does not degrade the noise characteristics of the microphone
amplifier. In addition to the fact that this amplifier provides operation in the full audio frequency
band, the cut-off frequency (which is inversely proportional to the magnitude of this resistance)
of the microphone amplifier must be sufficiently low, for example <20 Hz.
[0023]
The voltage drop across these diodes connected in this way is close to zero and resistive
elements with very large resistance values are obtained. The resistive element may be a plurality
of diode elements RE in series, or alternatively may be a series or parallel connection of
transistors or diodes.
[0024]
In one embodiment, the common mode feedback circuit comprises a common mode voltage port
for setting and adjusting the common mode voltage at the output of the amplification stage. The
differential microphone comprises its double backplate or, in the case of a double membrane
microphone, a differential signal port connected to this double membrane. The central electrode
of this microphone is held at a constant voltage corresponding to the signal ground. The bias
voltage is generated by the electronics of the amplifier of this microphone. A Dickson-type
voltage amplifier with a low pass filter connected at a later stage may be used for the MEMS
microphone, and the ECM microphone does not require such a high bias voltage.
[0025]
11-04-2019
6
This amplification stage may consist of a fully differential operational amplifier (op amp). The
first and second acoustic electrodes are connected to the input port of this operational amplifier.
The differential gain of this operational amplifier is generally greater than 1000. The
amplification stage may be a standard MOS structure, such as a folded cascode amplifier.
[0026]
The DC voltage at the output of the amplifier is determined by the common mode voltage of the
common mode feedback circuit of this amplifier. The DC voltage at the output of this amplifier,
which is determined at the common mode voltage port, is usually set to half the power supply
voltage of this microphone.
[0027]
The DC bias voltage of the acoustic capacitor may be generated on the same integrated circuit
chip. Via the common mode control port, the output of the amplification stage and the DC voltage
of the differential output port of the microphone are set to the values defined by this common
mode control port. The same DC voltage appears on the microphone capacitor. That is, the
voltage drop at RE is close to zero. In this way, the DC voltage of this microphone capacitor is
well defined and can also be adjusted.
[0028]
In one embodiment, the differential input port of the amplification stage is connected to the gate
of the differential pair of MOS transistors. The noise of these transistors connected to the
microphone electrode should be small. Often PMOS input stages are used for better noise
performance.
[0029]
In one embodiment, the microphone comprises a first capacitive element and a second capacitive
11-04-2019
7
element. The first capacitive element is connected between the first terminal of the output port of
the amplification stage and the first terminal of the input port. The second capacitive element is
connected between the second terminal of the output port of the amplification stage and the
second terminal of the input port. These first and second capacitive elements are part of the
feedback circuit of the amplifier.
[0030]
These capacitive elements may have a capacitance CF of between 0.05 pF and 10 pF.
[0031]
Furthermore, the amplification factor is approximately proportional to the following equation (1).
(V out +-V out-) / (V M1-V M2) C C M / C F. . . (1)
[0032]
Thus, the gain of the microphone is not related to the parasitic capacitance of the capacitor. Here,
V out + and V out− are output voltages at differential output terminals. V M1-V M2 is the
voltage applied to the combination of capacitor (s) formed by the two backplates and one
membrane between them. C M is the capacitance of each single capacitor comprising the
membrane and one back plate.
[0033]
The desired characteristics of the microphone described here are that the gain can be adjusted
by means of first and second capacitive elements as feedback capacitor elements having a
capacitance C F. In this case, C F may be connected with some sort of switch device, by means of
which the value of C F can be changed, ie programmed to give a variable gain.
[0034]
11-04-2019
8
From this, the cutoff frequency ω cut of the microphone amplifier is expressed by the following
equation (2). ω cut = 1 / (C F · R F). . . (2) Here, C F is the first or second capacitive element
described above, and R F is the first or second resistive element described above. Thus, using
such a feedback arrangement, the cut-off frequency ω cut can be less than or equal to 20 Hz.
Thus, a low cutoff frequency ω cut is obtained.
[0035]
The first and second terminals form two terminals of the differential signal port of the op amp. In
this case, the op amp is connected in a feedback configuration, and the feedback network
between the output of the op amp and the input of the op amp comprises a resistor with a very
large resistance value in parallel with the feedback capacitor.
[0036]
The purpose of this large resistance is to provide a DC path from the input to the output of the
op amp. At the same time, the resistive element provides a DC path from the microphone
electrode to the ground through the output of the amplifier. Given that the DC output voltage of
this amplifier is set by its common mode feedback circuit, the amplifier stage and the common
mode feedback circuit will be combined to provide a microphone amplifier that improves the
signal quality of the microphone . Such coupling enables a stable and well-defined DC bias
voltage of the microphone capacitor. This bias voltage is applied to the capacitor via the input
port of the amplification stage. Furthermore, this common feedback circuit provides a stable and
well-defined common mode output voltage to improve further processing of the electrical signal.
[0037]
Furthermore, such a microphone amplifier performs impedance transformation of the capacitive
impedance of the microphone's capacitor. Because a fully differential configuration is used, low
total harmonic distortion (THD) and good power supply rejection, ie good resistance to common
mode fluctuations from this power supply To be realized.
11-04-2019
9
[0038]
In one embodiment, the first microphone electrode, the central microphone electrode, and the
second microphone electrode are elements of an acoustically active portion of a MEMS
microphone or an electret condenser microphone.
[0039]
This microphone can be manufactured on a silicon chip using MEMS technology and comprises
circuit elements that are completely integrated in one IC chip using a CMOS process.
Two of these chips are packaged together. The MEMS microphone and the CMOS integrated
circuit can be manufactured on the same silicon substrate, ie, manufactured as a single chip. A
separate CMOS chip with the circuitry described above may be connected to the electret
condenser microphone to form the amplifier described above. In all cases, an amplifier with the
above feedback can provide an amplification factor of 1 to 20. In all cases, this differential
microphone can have one membrane and two backplates, or one backplate and two membranes.
[0040]
In one embodiment, the microphone further comprises a third capacitive element connected
between the first terminal of the input port of the amplification stage and the first microphone
electrode, and the input port of the amplification stage. And a fourth capacitive element
connected between the second microphone electrode (E2). These third and fourth capacitive
elements may have a capacitance of between 1 pF and 100 pF.
[0041]
Thus, by means of these DC blocking capacitors, it is possible to isolate the sensitive circuit
elements of the input port of the amplifier from the electrodes of the microphone capacitor.
Applying a high bias voltage to the microphone, particularly during the manufacturing process,
protects the amplifier against high DC voltages at its input node, which can damage the oxidized
gate of the input transistor.
11-04-2019
10
[0042]
In one embodiment, a third resistor is connected between the first microphone electrode and the
high bias voltage generated by the integrated circuit. The first and second microphone electrodes
are electrically connected to each other. In this way, the electrodes of the acoustic capacitor are
connected to the on-chip generated bias voltage.
[0043]
In one embodiment, the amplification stage comprises first, second, third, fourth, fifth, sixth,
seventh, eighth, ninth, tenth and eleventh transistors. The first, second and third transistors are
connected to a power supply. The fourth transistor is connected between the second transistor
and the sixth transistor, and the fifth transistor is connected between the third transistor and the
seventh transistor. The eighth transistor is connected between the sixth transistor and the
ground, and the ninth transistor is connected between the seventh transistor and the ground. The
tenth transistor is connected between the first transistor and the eighth transistor, and the
eleventh transistor is connected between the first transistor and the ninth transistor. The eighth
and ninth transistors are connected to the control port.
[0044]
This circuit is shown as an example, and the implementation of many other high gain
amplification stages found in the prior art documents in the field is possible. This amplification
stage may be designed to have optimum low noise performance when connected to a
microphone. This amplifier is usually designed to operate under low voltage and with low power
consumption.
[0045]
In one embodiment, the amplification stage comprises first, second, third, fourth, fifth, sixth,
seventh, eighth, ninth, tenth, eleventh and twelfth transistors. Equipped with The first transistor
and the second transistor are connected to a power supply. The third transistor is connected
between the first transistor and the seventh transistor, and the fourth transistor is connected
between the second transistor and the ninth transistor. The fifth transistor is connected between
11-04-2019
11
the first transistor and the eighth transistor, and the sixth transistor is connected between the
second transistor and the eighth transistor. The seventh transistor is connected between the third
transistor and the tenth transistor, and the ninth transistor is connected between the fourth
transistor and the twelfth transistor. The eighth transistor is connected to the eleventh transistor.
The tenth transistor, the eleventh transistor, and the twelfth transistor are connected to the
ground. The tenth transistor, the eleventh transistor, and the twelfth transistor are connected to
the control port.
[0046]
In one embodiment, the common mode feedback circuit comprises first, second, third, fourth,
fifth, sixth, seventh and eighth transistors. The first and second transistors are connected to a
power supply. The third transistor is connected between the first transistor and the seventh
transistor. The fourth transistor is connected between the second transistor and the seventh
transistor. The fifth transistor is connected between the first transistor and the eighth transistor.
The sixth transistor is connected between the second transistor and the eighth transistor. The
seventh and eighth transistors are connected to ground.
[0047]
This circuit is shown as an example, and many other common mode feedback implementations as
found in the prior art documents in the field are possible. Switched capacitor common mode
feedback may be used.
[0048]
In one embodiment, all circuit elements of this amplifier are fully integrated in a CMOS ASIC chip.
This chip can be manufactured in a standard CMOS process.
[0049]
The CMOS circuit chip can be incorporated into one package together with the above-described
MEMS microphone chip by soldering to a substrate (ceramic or the like) such as a printed circuit
board (PCB) or wire bonding of these two chips.
11-04-2019
12
[0050]
Furthermore, the amplifier and the microphone can be manufactured in a way starting from the
same silicon substrate to form one single chip.
[0051]
The method of driving a differential microphone, for example one of the microphones described
above, comprises the following steps:
-Receiving an acoustic signal.
-Converting this acoustic signal into an electrical signal. Adjusting the bias voltage of the first and
second microphone electrodes via the common mode voltage port (VCOM) of the common mode
feedback circuit.
[0052]
In one embodiment of this method, the electrical signal is amplified with an adjustable and welldefined gain that is not affected by parasitic capacitance.
[0053]
The basic principle of the invention and its exemplary embodiments are illustrated in the
following schematic drawings.
[0054]
It is a figure which shows the equivalent circuit schematic of a differential microphone.
It is a figure which shows embodiment of a resistive element.
It is a figure which shows the equivalent circuit schematic of an amplification stage. It is a figure
11-04-2019
13
which shows the equivalent circuit schematic of another other amplification stage. FIG. 3C shows
an equivalent circuit diagram of a common mode feedback circuit that may be used with the
amplification stage shown in FIG. 3A. FIG. 3C shows an equivalent schematic of another other
common mode feedback circuit that may be used with the amplification stage shown in FIG. 3B. It
is a figure which shows the equivalent circuit schematic of a microphone. It is a figure which
shows the cross section of a microphone.
[0055]
FIG. 1 shows an equivalent circuit diagram of a differential microphone MIC with an
amplification stage AS connected to the mechanical elements of the MEMS microphone MEM, ie
the acoustic electrodes. The mechanical element MEM includes a first electrode E1 and a second
electrode E2. A central electrode EC is disposed between the first electrode E1 and the second
electrode E2. The first electrode E1 and the second electrode E2 may be formed by porous
backplates of a double backplate or membranes of a double membrane microphone. The
amplification stage AS comprises a differential input port DIP. The differential output of this
amplification stage AS is connected to the differential output DOP of the microphone MIC. The
differential input port DIP has two terminals, each of which receives signals of approximately the
same absolute value but different polarities with respect to the signals of the other terminals. The
first resistance element RE1 is connected between the input terminal and the output terminal.
The second resistance element RE2 is connected between another input terminal to the abovementioned input terminal and another output terminal to the above-mentioned output terminal.
The above input and output terminals connected to one resistive element have opposite
polarities. That is, this amplification stage has a negative feedback configuration. Thus, the
amplifier feedback circuit AFC is formed by the first and second capacitive elements and the first
and second resistive elements.
[0056]
Furthermore, the first capacitive element CE1 is connected between the first output terminal and
the first input terminal. The second capacitive element CE2 is connected between the second
output terminal and the second input terminal. An embodiment of the amplification stage is
shown in FIGS. 3A and 3B. An embodiment of the common feedback circuit is shown in FIGS. 4A
and 4B.
[0057]
11-04-2019
14
FIG. 2 shows an embodiment of a resistive element RE comprising diodes connected in parallel
but in reverse polarity. Thus, a large resistance value for low voltage can be obtained.
[0058]
FIG. 3A shows a more detailed equivalent circuit diagram of an amplification stage AS comprising
eleven transistors T1-T11. The power supply PS is connected to the respective sources of the
first transistor T1, the second transistor T2, and the third transistor T3. The gate of the first
transistor T1 is connected to the gates of the second transistor T2 and the third transistor T3.
The drain of the first transistor T1 is connected to the sources of the tenth transistor and the
eleventh transistor T11. The gates of the tenth transistor T10 and the eleventh transistor T11
form respective input terminals of the differential input port DIP. The drains of the second
transistor T2 and the third transistor T3 are connected to the sources of the fourth transistor T4
and the fifth transistor T5. The gate of the fourth transistor T4 is connected to the gate of the
fifth transistor T5. The drains of the fourth transistor T4 and the fifth transistor T5 are
connected to the differential output port DOP of the common mode feedback circuit. The
respective terminals of these ports are connected to the drains of the sixth transistor T6 and the
seventh transistor T7, both gates of which are connected to each other. The drains of the tenth
transistor T10 and the eleventh transistor T11 are connected to the drains of the eighth
transistor T8 and the ninth transistor T9, respectively. The sources of the eighth transistor T8
and the ninth transistor T9 are connected to the ground GND. The gates of the eighth transistor
T8 and the ninth transistor T9 are connected to the control port VCNT.
[0059]
FIG. 3B shows an equivalent circuit diagram of another embodiment of an amplification stage AS
comprising 12 transistors T1-T12. The power supply PS is connected to the sources of the first
transistor T1 and the second transistor T2. The gates of the first transistor T1 and the second
transistor T2 are electrically connected to each other. The drains of the first transistor T1 and the
second transistor T2 are connected to the sources of the third transistor T3 and the fourth
transistor T4, respectively. Furthermore, these drains are connected to the drains of the fifth
transistor T5 and the sixth transistor T6, respectively. The gates of the fifth transistor T5 and the
sixth transistor T6 form the first and second input terminals TIN1, TIN2 of the above-mentioned
amplification stage, respectively. The sources of the fifth transistor T5 and the sixth transistor T6
are connected to the drain of the eighth transistor T8. Furthermore, the drains of the third
11-04-2019
15
transistor T3 and the fourth transistor T4 are connected to the drains of the seventh transistor
T7 and the ninth transistor, respectively, and are connected to the output terminals TOUT1 and
TOUT2 of the output port. The gate of the third transistor T3 is connected to the gate of the
fourth transistor T4. The gate of the seventh transistor T7 is connected to the gate of the eighth
transistor T8 and to the gate of the ninth transistor T9. The sources of the seventh transistor T7
and the ninth transistor T9 are connected to the drains of the tenth transistor T10 and the
twelfth transistor T12. The sources of the tenth transistor T10 and the twelfth transistor T12 are
connected to the ground GND, and the source of the eleventh transistor T11 is also connected to
the ground GND. The gate of the tenth transistor T10 is connected to the gate of the eleventh
transistor T11, to the gate of the twelfth transistor T12, and to the control port VCNT. The gate
of the seventh transistor T7 is connected to the gate of the ninth transistor T9.
[0060]
The first transistor T1 and the second transistor T2 are connected to the bias terminal, and the
third transistor T3 and the fourth transistor are connected to the bias terminal.
[0061]
FIG. 4A shows a detailed equivalent circuit diagram of a common mode feedback circuit CMFBC
comprising eight transistors T1-T8.
The power supply PS is connected to the sources of the first transistor T1 and the second
transistor T2, and their gates are connected to each other. The drains of the first transistor T1
and the second transistor T2 are connected to the sources of the third transistor T3 and the fifth
transistor T5, respectively, and are connected to the sources of the fourth transistor T4 and the
sixth transistor T6. These gates of the fifth transistor T5 and the sixth transistor T6 form a
terminal of the output port DOP of the common mode feedback circuit. Furthermore, the drains
of the third transistor T3 and the fourth transistor T4 are connected to the gate of the seventh
transistor T7 and to the drain of the seventh transistor. The gate of the seventh transistor T7 is
further connected to the control port VCNT. The source of the seventh transistor T7 is connected
to the ground and to the source of the eighth transistor T8. Furthermore, the drains of the fifth
transistor T5 and the sixth transistor T6 are connected to the gate and the drain of the eighth
transistor T8. The gates of the third transistor T3 and the fourth transistor T4 are connected
together and connected to the port VCOM.
[0062]
11-04-2019
16
FIG. 4B shows an equivalent circuit diagram of another embodiment of a common mode feedback
circuit CMFBC. The common mode feedback circuit CMFBC includes four capacitive elements CE,
and two capacitive elements are connected in series, and two series capacitive elements are
connected in parallel. The switch (s) may be used to connect or disconnect the capacitive
element. The common mode feedback circuit CNFBC includes a first output terminal TOUT1 and
a second output terminal TOUT2 forming a differential output port, a control port VCNT, and a
common mode voltage port VCOM.
[0063]
FIG. 5 shows an equivalent circuit diagram of a microphone MIC provided with a third capacitive
element CE3, a fourth capacitive element CE4, and a third resistive element RE3. The third
capacitive element CE3 is connected to the input terminal of the differential input port DIP. The
fourth capacitive element CE4 is connected to an input terminal other than the above input
terminal of the differential input port DIP. Furthermore, the third resistance element RE3 is
connected between the microphone electrode (or membrane) and the on-chip generated bias
voltage source. The other side of this resistive element is connected to the third and fourth
capacitive elements, and these capacitive elements are connected to the terminals of the
amplification stage AS.
[0064]
FIG. 6 shows a cross section of the microphone assembly MIC, which comprises a MEMS chip MC
comprising the acoustic elements of the microphone and an ASIC chip AC comprising the circuit
elements. The microphone chip MC and the ASIC chip AC are disposed on the substrate SU.
However, these acoustic and electrical elements of the microphone can be integrated on one
single chip, for example a silicon chip.
[0065]
The differential microphones are not limited to the embodiments described herein or the
embodiments shown. Also included in the invention are amplifiers with additional capacitive
elements, resistive elements, transistors, elements such as electrodes, or amplifiers with
11-04-2019
17
additional input or output ports.
[0066]
AC: ASIC chip AMP: amplifier AS: amplification stage CE: capacitance element CE1, CE2: first,
second capacitance element CE3, CE4: third, fourth capacitance element CMFBC: common mode
feedback circuit DIP: differential of amplification stage Input port DOP: Microphone differential
output E1, E2: Microphone capacitor first and second electrodes EC: Microphone capacitor center
electrode GND: Ground MEM: MEMS microphone (multiple) mechanical element MIC:
Microphone PS: Power source RE: resistance element RE1, RE2: first and second resistance
element RE3: third resistance element SU: substrate SW: switch T1-T12: transistors TIN1, TIN2:
first and second terminals TOUT1, T2 of differential input port TOUT2: for differential output
port 1, the second terminal VCNT: control port VCOM: common-mode voltage port
11-04-2019
18
Документ
Категория
Без категории
Просмотров
0
Размер файла
28 Кб
Теги
description, jp2015507877
1/--страниц
Пожаловаться на содержимое документа