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DESCRIPTION JP2016526331

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DESCRIPTION JP2016526331
Abstract A microphone includes micro electro mechanical system (MEMS) circuits and integrated
circuits. The MEMS circuit is configured to convert the audio signal to an electrical signal, and
the integrated circuit is coupled to the MEMS circuit and configured to receive the electrical
signal. Integrated circuits and MEMS circuits receive clock signals from an external host. The
clock signal has the effect of operating the MEMS circuitry and integrated circuit in a full system
operating mode during a first time period and operating in a voice activity operating mode
during a second time period. The voice activity mode has a first power consumption and the full
system operation mode has a second power consumption. The first power consumption is lower
than the second power consumption. The integrated circuit is configured to generate an interrupt
upon detection of voice activity and send the interrupt to the host. [Selected figure] Figure 2
VAD detection microphone and its operation method
[0001]
This application is based on US Provisional Patent Application Ser. No. 09 / 982,529, filed on
May 23, 2013, entitled "VAD Detection Microphone and Method of Operating the Same". Claim
the benefit under 35 USC 119 119 (e) of 61826587, the contents of this provisional patent
application being incorporated herein by reference in its entirety.
[0002]
The present application relates to microphones, and in particular to voice activity detection
(VAD) methods for use with these microphones.
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[0003]
The microphone is used to obtain an audio signal from the speaker.
This signal can be processed in several different ways once obtained.
Modern microphones can provide various functions, and these functions can interact with
various different algorithms to utilize these algorithms.
[0004]
For example, voice triggers used in mobile systems are a rising feature that customers want to
use. For example, the user may want the mobile device to utter a command, and in response to
this command, the mobile device may want to react. In these cases, a digital signal processor
(DSP) first detects if voice is present in the audio signal captured by the microphone and then
analyzes this signal to determine which of the received audio signals are Predict if there was a
speech like that. Various voice activity detection (VAD) methods have been developed and
deployed on various types of devices such as mobile phones and personal computers.
[0005]
Power consumption is an issue when using these methods. The lower the power consumption,
the longer the standby time. In modern smartphones (especially) the use of power is an
important parameter. Unfortunately, the current microphone operation method wastes a lot of
power. As a result, users are dissatisfied with previous methods and systems.
[0006]
For a more complete understanding of the present disclosure, please refer to the following
detailed description and the accompanying drawings.
[0007]
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FIG. 6 is a block diagram of a system with a microphone including power saving features using a
VAD algorithm, in accordance with various embodiments of the present invention.
5 is a flow chart of various states of a system with a microphone including power saving features
using a VAD algorithm, in accordance with various embodiments of the present invention. FIG. 5
is a block diagram of a microphone including power saving features using a VAD algorithm, in
accordance with various embodiments of the present invention. FIG. 1 is a block diagram of an
application specific integrated circuit (ASIC) according to various embodiments of the invention.
FIG. 5 is a block diagram of a host in accordance with various embodiments of the present
invention. FIG. 7 is a timing diagram illustrating the operation of a microphone including a power
saving function using a VAD algorithm, in accordance with various embodiments of the present
invention.
[0008]
Those skilled in the art will recognize that elements in the figures are illustrated for the sake of
simplicity and clarity. It will be further appreciated that some acts and / or steps are described or
illustrated in a particular order of occurrence, although one of ordinary skill in the art would
appreciate that such order specificity is indeed Will be understood as unnecessary. Also, the
terms and expressions as used herein have the usual meaning according to such terms and
expressions with respect to the corresponding field of search and study, unless otherwise
specifically stated otherwise in the specification. It will also be understood to have.
[0009]
The method changes the current mobile system segmentation method, the function of the
microphone, and the operating mode of the microphone. In this regard, a microphone is
presented that includes a voice or event detection block, which allows the microphone to
generate an interrupt signal to activate the system.
[0010]
In some aspects, the microphone described in the present invention includes five external
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connections. The first connection may be a power connection and the second connection may be
a ground connection. The third, fourth and fifth connections are connections from the
microphone to a host device (e.g. a host circuit in the device in which the microphone is present).
More specifically, the third connection can be a data connection, the fourth connection can be an
interrupt (sent from the microphone to the host), and the fifth connection (sent from the host to
the microphone Clock signal).
[0011]
The microphone can have multiple operating modes, which are controlled by the clock signal.
The host receives data and interrupt signals from the microphone. The host has multiple power
modes controlled by the interrupt signal generated by the microphone. The host generates a
clock signal for the microphone, which controls the operating mode of the microphone. In one
example, the microphone enters voice activity detection mode in the absence of a clock.
[0012]
In one example, the microphone includes a VAD (Voice Activity Detection) operating mode. In
this mode of operation, the power consumption of the microphone is very low, and the
microphone operates at a relatively low frequency that can be supplied externally (from the host)
or from an on-chip oscillator.
[0013]
This operation allows very low power consumption levels, as only the most necessary signal
processing is active during this mode. In one aspect, the analog signal processing block of the
microphone (such as a microphone preamplifier, an analog-to-digital converter, a voltage
regulator, and a charge pump providing bias voltage for a microelectromechanical system
(MEMS) microphone) is low power Operate. In this mode, these blocks operate at a low power
sufficient to achieve the bandwidth and signal-to-noise ratio (SNR) required for the VAD or event
detector to function. For example, an operating bandwidth of about 8 kHz after decimation and
an SNR of about 60 dB can be achieved.
[0014]
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The VAD or event detector can be implemented using well known techniques. For example, shortterm energy measurements versus long-term energy measurements, zero crossings, etc. can be
used to detect the audio signal.
[0015]
Also, the interface (the connection between the host and the microphone) is not limited to the
exact signal described herein. Other signals or combinations of other signals may also be used in
this regard. The physical implementation of the interface can be different. For example, the
implementation can be a single physical bi-directional line or multiple unidirectional lines.
[0016]
In another aspect, the microphone further includes a delay buffer. In another example, at start
up, buffered data is transmitted via the first transmission line and real time data is transmitted
via the second separate output line. In yet another example, buffer data is flushed or discarded
when switching modes.
[0017]
In yet another aspect, the microphone is overclocked so that buffered data catches up with real
time data. The microphone can also be used for multiple microphone audio trigger applications.
In one example, the microphone is activated to enable data synchronization of the second
microphone in the buffered or real time mode.
[0018]
Referring now to FIG. 1, a system 100 including a power saving function that uses a microphone
102 having a VAD algorithm will be described. In one example, the microphone 102 can include
a MEMS chip (including a MEMS die, a diaphragm and a charge plate), and an application specific
integrated circuit. The system also includes a host 104. The host 104 can include various
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processing functions and can be part of a device (eg, a personal computer, a cellular telephone, a
cellular telephone or a tablet) that includes the microphone 102.
[0019]
A VDD power signal 112 and a ground signal 114 are coupled to the microphone 102. An
interrupt signal 108 and a data signal 110 are transmitted from the microphone 102 to the host
104. The clock signal 106 is transmitted from the host 104 to the microphone 102.
[0020]
In one operational example of the system 100 of FIG. 1, the microphone 102 has multiple
operating modes, which are controlled by the clock signal 106. The host 104 receives the data
signal 110 and the interrupt signal 108 from the microphone 102. The host 104 has multiple
power modes controlled by an interrupt signal 108 generated by the microphone 102 upon
detection of voice activity or a particular voice event (e.g., a particular speech). The host 104
generates a clock signal 106 for the microphone 102, thereby controlling the mode of operation
of the microphone 102.
[0021]
In one example, microphone 102 includes a voice activity detection (VAD) mode of operation. In
this mode, the power consumption of the microphone 102 is very low, and the microphone
operates at a relatively low frequency that can be supplied externally (from the clock signal 106
supplied by the host 104) or from the internal on-chip oscillator of the microphone 102. . As a
result, the low power mode of operation can be changed to a high power mode of operation
when an interrupt occurs. It will be appreciated that the system can operate in both low power
and high power modes of operation by this interrupt.
[0022]
In some aspects, integrated circuits and MEMS circuits receive clock signals from an external
host. The clock signal has the effect of operating the MEMS circuitry and integrated circuit in a
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full system operating mode during a first time period and operating in a voice activity operating
mode during a second time period. The voice activity mode has a first power consumption or
level, and the entire system operation mode has a second power consumption or level. The first
power consumption is lower than the second power consumption. The integrated circuit is
configured to generate an interrupt upon detection of voice activity and send the interrupt to the
host. The microphone enters voice activity detection mode in the absence of a clock. The clock
circuit may be present on the same chip as the other components or may be present externally.
[0023]
In another aspect, the method operates the internal clock at a third power consumption or level
and then generates an external data stream and clock to signal the system to operate at a fourth
power consumption or level. Provide the ability to The third power level is lower than the fourth
power level, and the fourth power level is lower than the first power level.
[0024]
In yet another aspect, the external clock can be detected and applied after detection of voice
activity. At this time, the internal clock is synchronized with the external clock. Furthermore,
after synchronization, VAD signal processing is also synchronized to the external clock.
[0025]
In yet another aspect, when the external clock is removed and the overall system power is
reduced, the system may revert back to the internal clock to save power at the first or second
power level.
[0026]
In another example, an external signal can be generated from an internal combination of clock
and acoustic activity detection that functions as a combination of signal and clock to signal the
host to interrupt / activate and recognize audio signals .
In one example, the bandwidth of the buffered input signal may be approximately 8 kHz. Other
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examples are also possible. Data can be provided in PCM or PDM format. Other format examples
are also possible.
[0027]
Referring now to FIG. 2, flowcharts of various operating states of a system using a microphone
using the VAD algorithm will be described. The method of FIG. 2 has three operating modes: VAD
mode 202, (partial) host boot mode 204, and full system operating mode 206.
[0028]
In the VAD mode 202, data is not transmitted from the microphone. The host is in sleep mode in
this mode. In one aspect, when the host is in the sleep state, only those functions that need to
react to the interrupt signal generated from the microphone are enabled. In this mode, the host is
clocked with a very low clock to power down and all unnecessary functions are turned off. In this
mode, this mode has an absolute lowest possible power consumption since all unnecessary
blocks are stopped and no clock or data signal switching takes place. In other words, mode 202
is a low power mode, in which case VAD is valid and no external clock is received from the host.
[0029]
In (partial) host boot mode 204, an external clock is received from the host. Data is sent from the
microphone. The host is partially activated by the detection of keyword and / or voice activity.
Thereafter, the external clock of the microphone having a clock frequency corresponding to a
high performance level sufficient for reliable keyword detection is enabled.
[0030]
The full system operating mode 206 is a high power or standard operating mode of the
microphone.
[0031]
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In one operational example of the state transition diagram of FIG.
The VAD algorithm detects an event that triggers a transition from VAD mode 202 to partial
activation / activation mode 204.
[0032]
In mode 204, the host detects a keyword / utterance and determines that a particular keyword,
phrase or sentence has been recognized. This determination triggers a transition from mode 204
to full system boot 206.
[0033]
In mode 206, the host keyword detection / speech recognition algorithm determines that the
keyword, phrase or sentence is not recognized, which triggers a transition back to VAD mode
202. In this regard, another mode or condition (not shown in FIG. 2) determines whether the
system should enter partial boot / boot mode 204 or proceed directly to VAD mode 202.
[0034]
Next, referring to FIG. 3, a microphone 300 including a power saving function using a VAD
algorithm will be described. Microphone 300 includes a microphone chip or device 302. The
microphone chip 302 includes a MEMS die, a diaphragm and a charge plate. The system also
includes an ASIC 304. The ASIC 304 can include various processing functions. The MEMS chip
302 receives a charge pump signal 315 from the ASIC 304 to power the MEMS chip 302.
[0035]
VDD power signal 312 and ground signal 314 are coupled to ASIC 304. ASIC 304 receives
interrupt signal 308 and data signal 310 from a host (e.g., host 104 of FIG. 1). The host transmits
a clock signal 306, which is also received by the ASIC 304.
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[0036]
In one operation example of the microphone 300 of FIG. 3, the microphone 300 has a plurality of
operation modes, which are controlled by the clock signal 306. The MEMS chip 302 receives an
audio signal, which is converted to an electrical signal and transmitted to the ASIC 304 via the
data lead 311. ASIC 304 processes this signal into a data signal, transmits data signal 310, and
also generates interrupt signal 308. The host (eg, 104 in FIG. 1) generates a clock signal 306,
which controls the operating mode of the microphone 300.
[0037]
In one example, microphone 300 includes a voice activity detection (VAD) mode of operation. In
this mode, the power consumption of the microphone 300 is very low and the microphone
operates at a relatively low frequency that can be supplied externally (from the host supplied
clock signal 306) or from the internal on-chip oscillator of the microphone 300. As a result, the
low power operation can be changed to the high power operation when the interrupt is
performed. The system can operate in both low power and high power modes of operation with
this interrupt.
[0038]
A block diagram of an application specific integrated circuit 400 (ASIC) will now be described
with reference to FIG. The ASIC 400 includes a charge pump (CHP) 402, an amplifier 404, an
analog to digital converter 406, a voice activity detector (VAD) 408, a control block 410
(including an oscillator 412), and a switch 414.
[0039]
The charge pump (CHP) 402 charges the MEMS element (MEMS chip 302 in FIG. 3) to convert
the change in capacitance into a voltage. The amplifier 404 buffers the electrical signal of the
MEMS element (MEMS chip 302 in FIG. 3) and then amplifies the signal with a gain A.
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[0040]
A / D converter 406 converts the analog signal from amplifier 404 into a digital signal. Voice
activity detector (VAD) 408 processes the digital signal from A / D converter 406 and generates
an interrupt signal 411 if voice is detected. Control block 410 controls the internal state of ASIC
400 in response to external clock signal 413 (received from the host) and interrupt signal 411
from the VAD detector. Switch 414 is controlled by control block 410 to be able to transmit data
415 to an external host.
[0041]
At the output of A / D converter 406, a buffer can be included. This buffer may buffer data
representing an audio signal and may correspond to or approximate the delay of the VAD 408
(e.g., 10 ms to 360 ms to name an example range but other ranges are possible). At the output of
the A / D converter, decimation filter stages can be included to reduce buffer size (sampler RAM)
and power, thereby limiting bandwidth. In this case, an interpolation stage must also be added at
the buffer output. In this case, the delay can be about 200 msec. In another example, the delay
can be about 360 msec. Other examples of delay values are also possible. A buffer allows any
recognition algorithm that requires latency to wake up the host, collects sufficient background
noise statistics, and is provided to recognize key phrases in ambient noise.
[0042]
Buffered data may be sent to the host via any connection such as interrupt line 411 or data line
415. When data is transmitted via the data line 415, data can be transmitted at a clock rate
higher than that of the sampling clock.
[0043]
Also, the parameters or settings of VAD 408 can be changed or controlled. For example, the read
and write settings of the VAD 408 registers and (erasable and non-erasable) memories can be
changed or controlled to account for, for example, various levels of background noise.
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[0044]
The functionality of VAD 408 may also be extended or modified. For example, speech or phrase
detection can be used. Other features can also be included.
[0045]
A block diagram of host 500 will now be described with reference to FIG. The host 500 includes
an interface block 502, a digital signal processing (DSP) block 504 (including a keyword
detection block 506, and a word / speech recognition block 508), a control block 510 (clocked
by on-chip oscillator 511), and a memory. Including 512.
[0046]
Interface block 502 provides interface functionality to a microphone (eg, microphone 102 of FIG.
1). The interface block sends a clock signal 520 to the microphone and receives an interrupt
signal 522 and a data signal 524 from the microphone. The DSP block processes the data signal
in two steps using a keyword detection block 506 (detecting keywords) and a word / speech
recognition block 508 (detecting words or speech).
[0047]
Control block 510 controls the overall system power state, including the microphone (eg,
microphone 102 of FIG. 1), the block of host 500, and other blocks and functions external to the
host and microphone (not shown in FIG. 5). Control.
[0048]
Memory 512 stores system status, data and other information.
The on-chip oscillator 511 is controllable from the control block 510 and enables at least two
clock modes corresponding to at least two power modes.
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[0049]
Next, referring to FIG. 6, a timing diagram illustrating the operation of the microphone including
the power saving function using the VAD algorithm will be described. The signals in FIG. 6
illustrate how the system, and in particular the microphone, responds to the voice / event signal
to generate an interrupt signal. This timing diagram shows how the host responds to the
interrupt signal by changing the frequency of the clock signal after changing the mode of the
host itself after changing the mode of the host itself. There is.
[0050]
Signal 602 represents an audio signal. When an audio signal is detected, the microphone
generates an interrupt indicated by signal 604. The microphone also generates data indicated by
signal 606. As can be appreciated by signal 608, the host, in response to the interrupt, changes
the clock signal (sent to the microphone) from a low frequency signal to a high frequency signal.
In another example (indicated by signal 610), the host may not transmit the clock signal in low
power mode (pre-event) and may only start the high frequency clock signal upon detection of an
event.
[0051]
The present specification has described preferred embodiments of the present invention,
including the best mode known to the inventors for carrying out the invention. The illustrated
embodiments are exemplary only, and should not be construed as limiting the scope of the
present invention.
[0052]
202 VAD mode 204 Partial host start-up 206 Full system operation
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