close

Вход

Забыли?

вход по аккаунту

?

DESCRIPTION JP2018113629

код для вставкиСкачать
Patent Translate
Powered by EPO and Google
Notice
This translation is machine-generated. It cannot be guaranteed that it is intelligible, accurate,
complete, reliable or fit for specific purposes. Critical decisions, such as commercially relevant or
financial decisions, should not be based on machine-translation output.
DESCRIPTION JP2018113629
Abstract: To reduce current consumption after standby. SOLUTION: The DAP 1 shuts down when
the potential of the control port is low and operates when the potential of the control port is
high. Power supply voltage is supplied to the DC / DC converter 5 that supplies the signal, SoC2
and the collector via the resistor R1, the base is connected to the output port of SoC2, and the
emitter is connected to the reference potential. And a transistor Q1. The control port of the
amplifier circuit 3 is connected between the collector and the resistor R1. When the SoC 2 is in
the standby state, after the potential of the output port is made high, the DC / DC converter 5 is
shut down and the potential of the output port is made low. [Selected figure] Figure 2
Music playback device
[0001]
The present invention relates to a music reproduction apparatus that outputs an audio signal.
[0002]
In a music reproduction apparatus that outputs an audio signal to a headphone, there is a system
called imbalance and balance in headphone output (see, for example, Patent Document 1).
In the unbalanced system, a 3-pole terminal of 3.5 mm in diameter is used, and an audio signal is
transmitted by two types of "hot" and "cold". On the other hand, in the balance system, a 4-pole
terminal with a diameter of 2.5 mm is used, and signals are transmitted by three types of
11-04-2019
1
"ground", "hot" and "cold". "Cold" is the reverse phase of "hot". When extraneous noise is
generated, noise of the same phase is applied to both “hot” and “cold”. By inverting the
“cold” phase and mixing (mixing) with the “hot” signal, the extraneous noise cancels out and
the amplitude of the audio signal is doubled. For this reason, the balance method is resistant to
noise and has good sound quality.
[0003]
FIG. 6 is a digital audio player (hereinafter referred to as "DAP") having balanced output and
unbalanced output. FIG. The DAP 101 (music playback device) includes an SoC (System on Chip)
102, amplification circuits 103 and 104, a DC / DC converter 105, bipolar transistors Q101 and
Q102, a 3.5 mm jack 106, and a 2.5 mm jack 107.
[0004]
The SoC 102 controls each unit that configures the DAP 101. The amplifier circuit 103 amplifies
analog sound signals of two LR (left and right) channels. The analog audio signal of LR2 channel
amplified by the amplifier circuit 103 is output to the 3.5 mm jack 106 and the 2.5 mm jack 107.
The amplification circuit 104 amplifies the inverted analog audio signal of the LR2 channel. The
inverted analog audio signal of the LR 2 channel amplified by the amplifier circuit 104 is output
to the 2.5 mm jack 107. The amplifier circuits 103 and 104 shut down when the control port
potential is low. The amplifier circuits 103 and 104 operate when the potential of the control
port is high.
[0005]
The bipolar transistors Q101 and Q102 are npn bipolar transistors. The base of the bipolar
transistor Q101 is connected to the output port of the SoC 102 via a resistor R103. A power
supply voltage of 3.3 V is supplied to the collector of the bipolar transistor Q101 via the resistor
R101. The emitter of the bipolar transistor Q101 is connected to the reference potential. The
base of the bipolar transistor Q102 is connected to the output port of the SoC 102 via a resistor
R104. A power supply voltage of 3.3 V is supplied to the collector of the bipolar transistor Q102
via the resistor R102. The emitter of the bipolar transistor Q102 is connected to the reference
potential. The control port of the amplifier circuit 103 is connected between the collector of the
bipolar transistor Q101 and the resistor R101. The control port of the amplifier circuit 104 is
11-04-2019
2
connected between the collector of the bipolar transistor Q102 and the resistor R102.
[0006]
The DC / DC converter 105 steps down the voltage. The DC / DC converter 105 supplies the
stepped-down power supply voltage to the amplifier circuits 103 and 104.
[0007]
Here, the SoC 102 operates at a power supply voltage of 1.8V. Therefore, the SoC 102 can only
set the potential to 1.8 V for control. Further, in order to perform the shutdown control of the
amplifier circuits 103 and 104, a logic of 3.3 V level is required. Therefore, shutdown control of
the amplifier circuits 103 and 104 can not be performed directly from the SoC 102. Therefore,
bipolar transistors Q101 and Q102 are provided for voltage conversion. When operating the
amplification circuits 103 and 104, the SoC 102 sets the potential of the output port to low. In
this case, since the bipolar transistors Q101 and Q102 are in the off state, the potentials at the
control ports of the amplifier circuits 103 and 104 are high. Therefore, the amplifier circuits 103
and 104 operate. When the SoC 102 shuts down the amplifier circuits 103 and 104, the SoC 102
sets the potential of the output port to high. In this case, since the bipolar transistors Q101 and
Q102 are in the on state, the potential at the control port of the amplifier circuits 103 and 104 is
low. Therefore, the amplifier circuits 103 and 104 shut down.
[0008]
FIG. 7 is a diagram showing the logic in the case of changing from the unbalanced output to the
standby state. The SoC 102 changes the output port POS_AMP_SD from low to high. Therefore,
the amplifier circuit 103 shuts down. Next, the SoC 102 shuts down the DC / DC converter 105
(PWR_EN: low). The shutdown of the amplification circuit 103 is referred to as a positive side D /
A converter (hereinafter referred to as "DAC"). ) After standby.
[0009]
FIG. 8 is a diagram showing the logic in the case of entering the standby state from the balance
11-04-2019
3
output. The SoC 102 changes the output ports POS_AMP_SD, NEG_AMP_SD from low to high.
Therefore, the amplifier circuits 103 and 104 shut down. Next, the SoC 102 shuts down the DC /
DC converter 105 (PWR_EN: low). The shutdown of the amplifier circuits 103 and 104 is
referred to as a positive side and a negative side D / A converter (hereinafter referred to as
"DAC"). ) After standby.
[0010]
JP, 2013-005291, A
[0011]
As described above, in order to shut down the amplification circuits 103 and 104, the SoC 102
needs to make the potential of the output port high.
Therefore, there is a problem that current is consumed for control of the amplifier circuits 103
and 104 after standby.
[0012]
An object of the present invention is to reduce current consumption after standby.
[0013]
The music reproducing apparatus according to the first invention shuts down when the potential
of the control port is low, and operates when the potential of the control port is high. A power
supply voltage is supplied to the power supply unit for supplying the power supply voltage, the
control unit, and the collector via the resistor, the base is connected to the output port of the
control unit, and the emitter is connected to the reference potential. A bipolar transistor, wherein
the control port of the amplifier unit is connected between the collector and the resistor, and the
control unit sets the potential of the output port to high when in the standby state; The power
supply unit is shut down to set the potential of the output port low.
[0014]
In the present invention, the control unit sets the potential of the output port to high when in the
11-04-2019
4
standby state.
As a result, the bipolar transistor is turned on, the potential of the control port of the
amplification unit becomes low, and the amplification unit shuts down.
Next, the control unit shuts down the power supply unit. As a result, no power supply voltage is
supplied from the power supply unit to the amplification unit, so the amplification unit is in the
shutdown state regardless of the logic of the control port. Then, the control unit sets the potential
of the output port to low. As a result, after standby, current is not consumed for control of the
amplification unit. Thus, according to the present invention, current consumption after standby
can be reduced.
[0015]
A music playback apparatus according to a second aspect of the present invention is the music
playback apparatus according to the first aspect, further comprising a jack into which a plug is
inserted, and the control unit is in a standby state when detecting removal of the plug from the
jack. In order to set the potential of the output port high, the power supply unit is shut down to
set the potential of the output port low.
[0016]
The music reproducing apparatus according to a third aspect of the present invention is the
music reproducing apparatus according to the first or the second aspect, wherein the control unit
sets the potential of the output port to high when returning from the standby state. It is
characterized in that it is activated to set the potential of the output port to low.
[0017]
In the present invention, when returning from the standby state, the control unit sets the
potential of the output port to high, then activates the power supply unit, and sets the potential
of the output port to low.
As a result, even when the power supply voltage is supplied to the amplification unit when
returning from the standby state, the amplification unit does not start immediately, and the
amplification unit starts from the shutdown state.
11-04-2019
5
[0018]
The music reproducing apparatus according to the fourth invention shuts down when the
potential of the first control port is low, and operates when the potential of the first control port
is high. Amplifies the inverted audio signal of the left and right channels that shuts down when
the potential of the first amplification unit to be amplified and the second control port is low, and
operates when the potential of the second control port is high A power supply unit for supplying
a power supply voltage to the second amplification unit, the first amplification unit, and the
second amplification unit; a power supply voltage is supplied to the collector via the first resistor;
A power supply voltage is supplied to the first bipolar transistor connected to the first output
port of the control unit and the emitter is connected to the reference potential via the second
resistor to the collector, and the base is connected to the control unit Second output port A
second bipolar transistor, the emitter of which is connected to the reference potential, and the
first control port is connected between the collector of the first bipolar transistor and the first
resistor. The second control port is connected between the collector of the second bipolar
transistor and the second resistor, and the control unit sets the first output port low in the case
of an unbalanced output, and When the potential of the 2 output port is made high and it is made
the standby state from the unbalanced output, the power supply unit is shut down after the 1st
output port is made high, the 1st output port and the 2nd output port Is set to low.
[0019]
In the present invention, the control unit sets the potential of the first output port to high when
the standby state is set from the unbalanced output.
As a result, the first bipolar transistor is turned on, the potential of the control port of the first
amplification unit becomes low, and the first amplification unit shuts down.
Next, the control unit shuts down the power supply unit. As a result, since the power supply
voltage is not supplied from the power supply unit to the first amplification unit and the second
amplification unit, the first amplification unit and the second amplification unit shut down
regardless of the logic of the control port. Then, the control unit sets the potentials of the first
output port and the second output port to low. As a result, after standby, current is not consumed
for control of the first amplification unit and the second amplification unit. Thus, according to the
present invention, current consumption after standby can be reduced.
11-04-2019
6
[0020]
The music reproducing apparatus according to a fifth aspect of the present invention is the music
reproducing apparatus according to the fourth aspect, further comprising a jack for imbalance
into which a plug for imbalance is inserted, and the control unit is connected to the jack for
imbalance When the removal of the unbalance plug is detected, the power supply unit is shut
down after the potential of the first output port is made high in order to enter a standby state,
and the first output port, and It is characterized in that the potential of the 2 output port is made
low.
[0021]
The music reproduction apparatus according to a sixth aspect of the present invention is the
music reproduction apparatus according to the fourth or fifth aspect, wherein the control unit
sets the potential of the first output port and the second output port low in the case of balanced
output. When making the standby state from the balanced output, the power supply unit is shut
down after the potentials of the first output port and the second output port are made high, and
the first output port and the second output port are shut off. It is characterized in that the
potential of the output port is set low.
[0022]
In the present invention, the control unit sets the potentials of the first output port and the
second output port to high when the standby mode is set from the balanced output.
As a result, since the first bipolar transistor and the second bipolar transistor are turned on, the
potentials at the control ports of the first amplifying unit and the second amplifying unit become
low, and the first amplifying unit and the second amplifying unit , Shut down.
Next, the control unit shuts down the power supply unit. As a result, since the power supply
voltage is not supplied from the power supply unit to the first amplification unit and the second
amplification unit, the first amplification unit and the second amplification unit shut down
regardless of the logic of the control port. Then, the control unit sets the potentials of the first
output port and the second output port to low. As a result, after standby, current is not consumed
for control of the first amplification unit and the second amplification unit. Thus, according to the
present invention, current consumption after standby can be reduced.
11-04-2019
7
[0023]
A music reproduction apparatus according to a seventh aspect of the present invention is the
music reproduction apparatus according to the sixth aspect, further comprising a jack for
balance into which a plug for balance is inserted, and the control unit further comprises the
balance from the jack for balance When it is detected that the plug for the plug is removed, the
power supply unit is shut down after the potentials of the first output port and the second output
port are made high in order to enter the standby state, and the first output port, And setting the
potential of the second output port low.
[0024]
The music reproduction apparatus according to an eighth invention is the music reproduction
apparatus according to any of the fourth to seventh inventions, wherein the control unit is
configured to set the first output port when the standby state is changed to an unbalanced
output, and After setting the potential of the second output port to high, the power supply unit is
activated to set the potential of the first output port to low.
[0025]
In the present invention, when the control unit changes the standby state to an unbalanced
output, after setting the potentials of the first output port and the second output port to high, the
control unit activates the power supply unit and sets the potential of the first output port Low.
As a result, even when the power supply voltage is supplied to the first amplification unit when it
becomes an unbalanced output from the standby state, the first amplification unit does not start
up immediately and the first amplification unit shuts down. to start.
[0026]
The music reproduction apparatus according to a ninth aspect of the present invention is the
music reproduction apparatus according to any of the fourth to eighth aspects, wherein the
control unit is configured to set the first output port when the standby state is changed to a
balanced output. After setting the potentials of the two output ports to high, the power supply
unit is activated to set the potentials of the first output port and the second output port to low.
[0027]
11-04-2019
8
In the present invention, when the control unit changes the standby state to the balanced output,
after setting the potentials of the first output port and the second output port to high, the control
unit activates the power supply unit and sets the first output port, and 2 Make the output port
potential low.
Thus, even when the power supply voltage is supplied to the first amplification unit and the
second amplification unit when the balance output is changed from the standby state, the first
amplification unit and the second amplification unit do not start immediately, and the first
amplification is performed. Start from the state where the unit and the second amplification unit
are shut down.
[0028]
According to the present invention, current consumption after standby can be reduced.
[0029]
It is a figure showing composition of a digital audio player concerning an embodiment of the
present invention.
It is a figure which shows the logic in the case of making it a standby state from an unbalanced
output.
It is a figure which shows the logic in the case of making it a standby state from a balance output.
It is a figure which shows the logic in the case of making an unbalanced output from a standby
state. It is a figure which shows the logic in the case of making a balance output from a standby
state. It is a figure which shows the structure of a digital audio player. It is a figure which shows
the logic in the case of making it a standby state from an unbalanced output. It is a figure
showing the logic in the case of changing to a standby state from balance output.
[0030]
11-04-2019
9
Hereinafter, embodiments of the present invention will be described. FIG. 1 is a digital audio
player according to an embodiment of the present invention (hereinafter referred to as "DAP").
FIG. DAP1 (music playback device) has balanced output and unbalanced output. As shown in FIG.
1, DAP 1 includes SoC (System on Chip) 2, amplification circuits 3, 4, DC / DC converter 5,
bipolar transistors Q1, Q2, 3.5 mm jack 6, 2.5 mm jack 7.
[0031]
The SoC2 (control unit) controls each unit constituting the DAP1. The amplification circuit 3
(amplification unit, first amplification unit) amplifies analog sound signals of LR (left and right)
two channels. The analog audio signal of the LR2 channel amplified by the amplifier circuit 3 is
output to the 3.5 mm jack 6 and the 2.5 mm jack 7. The amplification circuit 4 (amplification
unit, second amplification unit) amplifies the inverted analog audio signal of the LR2 channel.
The inverted analog audio signal of the LR2 channel amplified by the amplifier circuit 4 is output
to the 2.5 mm jack 7. The amplifier circuits 3 and 4 shut down when the control port potential is
low. The amplifier circuits 3 and 4 operate when the potential of the control port is high.
[0032]
The bipolar transistors Q1 and Q2 are npn bipolar transistors. The base of the bipolar transistor
Q1 (first bipolar transistor) is connected to the output port of SoC2 via a resistor R3. A power
supply voltage of 3.3 V is supplied to the collector of the bipolar transistor Q1 via the resistor R1
(first resistor). The emitter of the bipolar transistor Q1 is connected to the reference potential.
The base of the bipolar transistor Q2 (second bipolar transistor) is connected to the output port
of SoC2 via a resistor R4. A power supply voltage of 3.3 V is supplied to the collector of the
bipolar transistor Q2 via the resistor R2. The emitter of the bipolar transistor Q2 is connected to
the reference potential. The control port of the amplifier circuit 3 is connected between the
collector of the bipolar transistor Q1 and the resistor R1. The control port of the amplifier circuit
4 is connected between the collector of the bipolar transistor Q2 and the resistor R2.
[0033]
The DC / DC converter 5 (power supply unit) steps down the voltage. The DC / DC converter 5
supplies the stepped-down power supply voltage to the amplifier circuits 3 and 4. The 3.5 mm
jack 6 is a jack for imbalance into which a plug for imbalance is inserted. The 2.5 mm jack 7 is a
11-04-2019
10
jack for balancing into which a plug for balancing is inserted. The SoC 2 detects plug insertion
into the 3.5 mm jack 6 and 2.5 mm jack 7, removal of the plug from the 3.5 mm jack 6 and 2.5
mm jack 7.
[0034]
Here, SoC2 is operating at a power supply voltage of 1.8V. Therefore, SoC2 can only set the
potential to 1.8 V for control. Further, in order to perform the shutdown control of the amplifier
circuits 3 and 4, a logic of 3.3 V level is required. Therefore, shutdown control of the amplifier
circuits 3 and 4 can not be performed directly from the SoC 2. Therefore, bipolar transistors Q1
and Q2 are provided for voltage conversion. When operating the amplification circuits 3 and 4,
the SoC 2 sets the potential of the output port to low. In this case, since the bipolar transistors Q1
and Q2 are in the off state, the potentials at the control ports of the amplifier circuits 3 and 4 are
high. Therefore, the amplifier circuits 3 and 4 operate. When the SoC 2 shuts down the amplifier
circuits 103 and 104, the SoC 2 sets the potential of the output port to high. In this case, since
the bipolar transistors Q1 and Q2 are in the on state, the potential at the control port of the
amplifier circuits 3 and 4 is low. Therefore, the amplifier circuits 3 and 4 shut down.
[0035]
FIG. 2 is a diagram showing the logic in the case of changing from the unbalanced output to the
standby state. When the SoC 2 detects removal of the plug for imbalance from the 3.5 mm jack 6,
the DAP 1 is put in the standby state. The SoC 2 sets the potential of the output port
POS_AMP_SD to low in the case of an unbalanced output. Thereby, the positive side amplifier
circuit 3 is operating. In addition, SoC2 sets the potential of the output port NEG_AMP_SD to
high. As a result, the negative amplification circuit 4 is shut down. The SoC 2 sets the potential of
the output port POS_AMP_SD to high in the standby state. Thereby, the positive side amplifier
circuit 3 is shut down. Next, the SoC 2 shuts down the DC / DC converter 5 (PWR_EN: low). As a
result, no power supply voltage is supplied from the DC / DC converter 5 to the amplifier circuits
3 and 4, so the amplifier circuits 3 and 4 are in the shutdown state regardless of the logic of the
control port. Then, the SoC 2 sets the potentials of the output ports POS_AMP_SD and
NEG_AMP_SD to low after 60 ms has elapsed since the DC / DC converter 5 was shut down. As a
result, no current is consumed for control of the amplifier circuits 3 and 4 after standby. Thus,
according to the present embodiment, the current consumption after standby can be reduced.
[0036]
11-04-2019
11
FIG. 3 is a diagram showing the logic in the case where the balance output is changed to the
standby state. When the SoC 2 detects removal of the plug for balancing from the 2.5 mm jack 7,
the DAP 1 is put in the standby state. In the case of balanced output, the SoC 2 sets the potentials
of the output ports POS_AMP_SD and NEG_AMP_SD to low. Thereby, the positive side amplifier
circuit 3 and the negative side amplifier circuit 4 are operating. The SoC 2 sets the potentials of
the output ports POS_AMP_SD and NEG_AMP_SD to high in the standby state. As a result, the
positive side amplifier circuit 3 and the negative side amplifier circuit 4 are shut down. Next, the
SoC 2 shuts down the DC / DC converter 5 (PWR_EN: low). As a result, no power supply voltage
is supplied from the DC / DC converter 5 to the amplifier circuits 3 and 4, so the amplifier
circuits 3 and 4 are in the shutdown state regardless of the logic of the control port. Then, the
SoC 2 sets the potentials of the output ports POS_AMP_SD and NEG_AMP_SD to low after 60 ms
has elapsed since the DC / DC converter 5 was shut down. As a result, no current is consumed for
control of the amplifier circuits 3 and 4 after standby. Thus, according to the present
embodiment, the current consumption after standby can be reduced.
[0037]
FIG. 4 is a diagram showing the logic in the case where the unbalanced output is made from the
standby state. In the standby state, SoC2 sets the potentials of the output ports POS_AMP_SD and
NEG_AMP_SD to low. The SoC 2 sets the potentials of the output ports POS_AMP_SD and
NEG_AMP_SD to high in the case of unbalanced output. The SoC 2 activates the DC / DC
converter 5 (PWR_EN: high) 1 ms after the potentials of the output ports POS_AMP_SD and
NEG_AMP_SD are made high. Here, since the potentials of the output ports POS_AMP_SD and
NEG_AMP_SD of the SoC 2 are high, the amplifier circuits 3 and 4 remain shut down. The SoC 2
makes the potential of the output port POS_AMP_SD low 6 ms after the DC / DC converter 5 is
activated. Thereby, the amplifier circuit 3 operates. As described above, in this embodiment, even
when the power supply voltage is supplied to the amplifier circuit 3 when the standby state is
changed to an unbalanced output, the amplifier circuit 3 does not start up immediately and the
amplifier circuit 3 is shut down Boot from state.
[0038]
FIG. 5 is a diagram showing the logic in the case where the balance output is made from the
standby state. In the standby state, the SoC 2 sets the output ports POS_AMP_SD and
NEG_AMP_SD to the potential low. The SoC 2 sets the potentials of the output ports
11-04-2019
12
POS_AMP_SD and NEG_AMP_SD to high in the case of balanced output. The SoC 2 activates the
DC / DC converter 5 (PWR_EN: high) 1 ms after the potentials of the output ports POS_AMP_SD
and NEG_AMP_SD are made high. Here, since the potentials of the output ports POS_AMP_SD
and NEG_AMP_SD of the SoC 2 are high, the amplifier circuits 3 and 4 remain shut down. The
SoC 2 sets the potentials of the output ports POS_AMP_SD and NEG_AMP_SD low 6 ms after the
DC / DC converter 5 is activated. Thereby, the amplifier circuits 3 and 4 operate. As described
above, in the present embodiment, even when the power supply voltage is supplied to the
amplifier circuits 3 and 4 when the standby state is changed to the balanced output, the amplifier
circuits 3 and 4 do not start up immediately. Start from the state where it is shut down.
[0039]
According to this embodiment, the current consumption is reduced by 1.3 mA and the current
consumption is reduced by 5% of the whole during standby as compared to the case where the
potential of the output port of SoC 2 is high even after standby.
[0040]
As mentioned above, although embodiment of this invention was described, the form which can
apply this invention is not restricted to the above-mentioned embodiment, As it illustrates below,
it is suitably in the range which does not deviate from the meaning of this invention. It is possible
to make changes.
[0041]
In the above embodiment, DAP 1 has an unbalanced output and a balanced output.
Not limited to this, DAP 1 may not have a balance output.
In this case, the amplifier circuit 4, the 2.5 mm jack 7, the bipolar transistor Q2, and the resistors
R2 and R4 are unnecessary.
[0042]
In the above-mentioned embodiment, DAP was illustrated as a music reproduction device. Not
11-04-2019
13
limited to this, a smartphone, a tablet PC, a USB DAC, a headphone amplifier, etc. may be used.
[0043]
The present invention can be suitably adopted for a music reproduction apparatus that outputs
an audio signal.
[0044]
DESCRIPTION OF SYMBOLS 1 DAP (music reproduction apparatus) 2 SoC (control part) 3
amplification circuit (amplification part, 1st amplification part) 4 amplification circuit
(amplification part, 2nd amplification part) 5 DC / DC converter (power supply part) 6 3.5 mm
Jack 7 2.5mm jack Q1 bipolar transistor (first bipolar transistor) Q2 bipolar transistor (second
bipolar transistor) R1 resistance (first resistance) R2 resistance (second resistance)
11-04-2019
14
Документ
Категория
Без категории
Просмотров
0
Размер файла
24 Кб
Теги
description, jp2018113629
1/--страниц
Пожаловаться на содержимое документа