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DESCRIPTION JPH11290507

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DESCRIPTION JPH11290507
[0001]
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a
pachinko machine that moves a sound image position of a sound effect for information
notification according to a game state by moving it back and forth and to the left and right.
[0002]
2. Description of the Related Art Pachinko machines are usually configured to generate sound
from a speaker according to the gaming state. For example, in JP-A-8-266709, a game control
unit that controls the gaming state of a gaming machine, a voice synthesis circuit that is
controlled by the gaming control unit and that synthesizes a voice according to the gaming state
of the gaming machine, and voice synthesis Voice ROM containing voice data, that is, ADPCM
(Adaptive Differential Pulse Code Modulation) data, and the voice synthesis circuit synthesizes
stereo sound based on sound data read out from the voice ROM according to the gaming state. A
pachinko machine that is configured to do so is described.
[0003]
The voice synthesis circuit described above includes a DSP (Digital Signal Processor), a memory
interface, a microcomputer interface, a reset circuit, a clock oscillator, an ADPCM decoder, three
electronic volumes, a pan pot circuit, and two mixing circuits. And two digital to analog
converters.
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[0004]
Then, the game control unit gives the DSP a command according to the game state, and the DSP
gives the memory interface the address of the data to be read from the voice ROM according to
the command, and reads the voice synthesis data from the voice ROM.
The DSP further controls the three electronic volumes and the panpot circuit according to a
command given from the game control unit to adjust the volume of the synthesized voice of each
channel, thereby using the stereo voice to surround the player. The sound control is performed
such that the sound source circulates and the sound source moves to the player back and forth
and to the left and right.
[0005]
However, the voice control means of the above-mentioned pachinko machine is configured by
separately arranging and combining the elements constituting the voice ROM and the voice
synthesis circuit separately on the circuit board, and in the manufacture thereof Each element
has to be disposed on the circuit board and electrically connected, which requires a working
time.
[0006]
SUMMARY OF THE INVENTION An object of the present invention is to provide a pachinko
machine capable of wiring and connecting control circuits related to voice control in a short time.
[0007]
A pachinko machine according to the present invention has a game control unit for controlling a
gaming state, and a voice driving circuit for outputting a voice according to the gaming state,
which is described above. The voice drive circuit integrally includes a performance data storage
means for storing performance data, and a voice reproduction means for sequentially reading out
performance data from the performance data storage means in response to an instruction from
the game control unit, and reproducing and outputting the performance data. A voice synthesis
control IC is provided.
[0008]
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Also, the sound reproducing means of the voice synthesis control IC includes panpot setting
means for moving the sound source localization of reproduced sound to the left and right,
volume setting means for moving the sound source localization of reproduced sound back and
forth, and envelope setting Characterized by having means.
[0009]
Furthermore, music data and ADPCM sound data are stored in the performance data ROM, and
the sound reproducing means reproduces a musical tone based on the music data and the
ADPCM based on the ADPCM sound data. And an ADPCM controller for reproducing sound.
[0010]
The pachinko machine is provided with a winning device having a symbol display device and a
big winning opening on the game board surface, and at least a sound image of a big winning
opening opening operation sound among sound effects for notifying information according to an
instruction from the gaming control unit. The position may be moved back and forth and left and
right for notification.
[0011]
BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be
described below with reference to the drawings.
[0012]
Hereinafter, embodiments of the present invention will be described with reference to the
drawings.
[0013]
FIG. 1 is a front view of a pachinko machine according to an embodiment.
The pachinko machine 1 is composed of a pachinko machine main body 2 and a card unit 3
juxtaposed to the left side of the pachinko machine main body 2.
[0014]
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An inner frame 4 is provided on an outer frame (not shown) of the pachinko machine main body
2 by a hinge or the like so as to be openable and closable in the front direction of the drawing. It
is provided.
A metal frame 6 is provided on the inner frame 4 so as to surround the game board 5, and a
glass door 7 is attached to the metal frame 6 so as to be openable and closable.
Below the metal frame 6, an upper tray 8 is provided to hold the pachinko balls in alignment and
standby, below the upper tray 8 a lower tray 9 is provided, and to the right of the lower tray 9, a
hitting handle 10 is provided. Speakers 11a and 11b are provided inside the upper tray.
[0015]
In addition, a frame decoration 12 is provided at the upper edge of the inner frame 4, and frame
decoration lamps A1 and A1 for left and right two lights are disposed at the center inside the
frame decoration 12 and a frame decoration lamp A2 and a frame are provided on the left A
decoration lamp A3 is provided, and a frame decoration lamp A2 and a frame decoration lamp
A3 are provided on the right side.
Furthermore, the key decoration part 13 is provided in the upper part of the right side edge of
the inner frame 4, and inside the key decoration part 13, the key decoration lamps B1 and B1 of
two upper and lower lights are arrange | positioned.
[0016]
FIG. 2 is a front view showing the gaming board 5 of the pachinko machine 1.
As shown in FIG. 2, the symbol display unit 14 is disposed substantially at the center of the game
board 5, and the left gate 15 and the right gate 16 are provided on the left and right of the lower
portion of the symbol display unit 14, respectively. Below the symbol display unit 14 is provided
a tulip-type start winning opening 17 which is driven to be expanded by a solenoid or the like,
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and at the lower part of the game board 5 a prize unit 18 is disposed.
[0017]
Furthermore, on the game board 5 side, lamp-equipped wind turbines 19 and 19 are provided on
the left and right sides of the upper part of the symbol display unit 14, respectively. The regular
winning openings 20 and 21 are provided on the sleeves, respectively.
Further, a payout display unit 22 is provided at the upper left corner of the game board 5, and a
ball out display unit 23 is provided at the upper right corner of the game board 5.
The game board 5 is provided with an out port 24, a wind turbine 25, an inner rail 26, an outer
rail 27 and the like, but these elements are the same as conventional ones.
[0018]
3 shows the arrangement of various lamps and LEDs on the surface of the game board 5. FIG. 4
is an enlarged front view of the symbol display unit 14. FIG. 5 is an enlarged front view of the
prize unit 18. As shown in FIG.
As shown in FIG. 3, in the game board 5, the payout LED (P1) is disposed inside the payout
display portion 22 at the upper left corner, and the spherical LED (P2) is inside the ball breakage
display portion 23 at the upper right corner. It is deployed. Further, a rail decoration 28 is
provided along the outer rail 27 on the outer upper portion of the outer rail 27, and the
decoration LED (Q 1) and the decoration LED (Q 2) are alternately arranged inside the rail
decoration 28.
[0019]
In addition, decoration lamps C1 and C1 are provided behind the wind turbines 19 and 19,
respectively, and decoration lamps D1 and D1 are provided behind the left gate 15 and the right
gate 16, respectively. At the back, decoration lamps E1, E1 are respectively provided, and at the
back of the electric tulip 29 provided with the start winning hole 17, a decoration lamp F1 is
provided.
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[0020]
Further, as shown in FIG. 2, the symbol display unit 14 has a special symbol display device 30
constituted by a color liquid crystal display device at the center and a frame 31 for incorporating
and supporting the special symbol display device 30.
An arched overhanging portion 32 is provided on the top of the frame 31, and passage entrances
33, 33, and 33 are respectively provided on the top of the overhanging portion 32 and the left
and right sides of the overhanging portion 32. As shown in FIG. 4, in the overhang portion 32, a
normal symbol display 34 consisting of a segment type display is disposed at the center, and two
regular symbols for the normal symbol are provided on the left and right sides of the normal
symbol display 34. The memory number display LEDs 35, 35, 35, 35 are arranged. Moreover,
decoration LED (J1, J1) is provided in the left-right both sides of the overhang | projection part
32. As shown in FIG.
[0021]
As shown in FIG. 4, decorative members 36, 36 extending laterally to the left and right are
respectively provided on both sides below the overhanging portion 32 of the frame 31, and the
decorative members are arranged below the left and right decorative members 36, 36. 37 and 37
are respectively provided, and further, decorative members 38 and 38 are respectively provided
on the lower side thereof, and a concave portion 39 is provided in the center of the frame 31
under the overhang portion 32. A display device 30 is provided.
[0022]
And two memory item number display LEDs 41, 41, 41 for special symbols are disposed behind
the left and right decorative members 36, 36, and the decorative LEDs 37, 37 are provided with
decorative LEDs (K1, K1, K1) is provided, and three decorative LEDs (H1, H2, H3) are
respectively provided in the interior of the decorative members 38, 38 and in the side wall of the
frame 31 as the upper part thereof.
[0023]
Furthermore, ball outlets 40 and 40 are provided on the left and right sides of the lower portion
of the frame 31, and guiding members 42 and 42 are provided on the lower portion of the frame
31 to face the ball outlets 40 and 40, respectively. , 42, a notch 43 for dropping the pachinko
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ball downward is formed.
[0024]
The display unit 44 of the special symbol display device 30 is divided into a symbol display unit
45 at the top and a moving image display unit 46 at the bottom, and further, the symbol display
unit 45 is a left symbol display unit 47, a middle symbol display unit 48 and a right symbol The
display unit 49 is divided into three.
[0025]
As shown in FIG. 5, the prize unit 18 is provided with a large winning opening 50 opened at the
center by the opening and closing door 51, and normal winning openings 52 and 52 on the left
and right as well as decorative decoration LEDs (M1 to M8) , Decorative LEDs (N1 to N8) are
collectively provided.
In a part of the inside of the special winning opening 50, a specific area 53 which is a special
winning area is provided.
[0026]
The special winning opening 50 is set to 15 payout openings, the normal winning opening 21 is
set to 8 dispensing openings, and the other start winning openings 17, the normal winning
openings 20, and the normal winning openings 52 and 52 are 6 It is set to the single delivery
opening.
[0027]
As mentioned above, although each element arrange | positioned on the game board 5 surface
was demonstrated, the starting opening for the symbol fluctuation start in the normal symbol
indicator 34 of the symbol display unit 14 is the left gate 15 and the right gate 16 of FIG. It is set
to.
In addition, the lottery probability of the hit in connection with the normal symbol display 34 is
set to 5/10.
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[0028]
Further, the start winning opening 17 in FIG. 2 is set as a start opening for starting symbol
fluctuation regarding the left, middle and right symbols in the special symbol display device 30
of the symbol display unit 14.
In addition, the lottery probability of the big hit concerning a special symbol is set to two types, a
normal probability 1/337 and a high probability 5/337.
[0029]
The types of symbols stopped and displayed on each of the left symbol display unit 47 and the
right symbol display unit 49 in the special symbol display device 30 are all “1”, “2”, “3”,
“4”, “5” , “6”, “7”, “8”, “9”, “X”, “Y”, and “Z”.
In addition, the types of symbols to be stopped and displayed on the middle symbol display
section 48 are “1”, “2”, “3”, “4”, “5”, “6”, “7”, “7”, “8”, “ There are 13
types of 9 "," X "," Y "," Z "and" L ".
[0030]
FIG. 6 is a reverse view of the game board 5 shown in FIG.
Guide paths 54 and 55 for guiding the pachinko balls in the passage entrances 33, 33 and 33
shown in FIG. 1 to the ball outlets 40a and 40b are provided on the left and right sides of the
game board back surface 5a. A guiding path 56 for guiding the pachinko balls into the ball outlet
40a is provided in communication with the guiding path 54, and a guiding path 57 for guiding
the pachinko ball in the right gate 16 to the ball outlet 40b is a guiding path It is provided in
communication with 55.
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[0031]
In the lower part of the game board back surface 5a, the start winning opening 17, the normal
winning opening 20, the normal winning opening 21, the normal winning openings 52, 52 and
the special winning opening 50 are covered to obtain each winning opening 17, 20, 21, A
collecting bowl 58 is provided for collecting the 52, 50 and 50 pachinko balls, and a safe ball
guiding rod 59 for aligning the gathered pachinko balls in one row is disposed below the
collecting bowl 58.
[0032]
A start opening winning detection switch SW1 is provided corresponding to the start winning
opening 17, and gate switches SW2 and SW3 for detecting gate passage are provided
corresponding to the left and right gates 15 and 16, respectively. A special winning opening
winning detection switch SW4 is provided corresponding to the specific area passage detecting
switch SW5 for detecting winning in a specific area 53 inside the special winning opening 50,
and a regular winning opening which is an eight payout opening. 21. A prize detection switch
SW6 is provided corresponding to 21 and a normal electric combination release solenoid 60 for
expanding the start prize opening 17, a special prize opening solenoid 61 for opening the open /
close door 51, a specific area Solenoid 62 for opening a specific area door for opening a door
(not shown) for closing a 53 so that a pachinko ball can win a prize, a guiding member Guide
member drive motor MT for moving up and down is deployed to 2,42.
[0033]
Further, at the end of the safe ball guiding rod 27, a safe ball detection switch 63 is provided, and
a safe ball discharging solenoid 64 for discharging the safe ball for each ball is provided.
[0034]
Next, a control system provided in the pachinko machine of the present embodiment will be
described.
FIG. 7 is a block diagram of the main part of the main control unit, FIG. 8 is a block diagram of a
circuit for controlling the lamp and the LED in the main control unit, and FIG. 9 is a block
diagram of the main part of the sub control unit.
In FIGS. 7 to 9, lines for supplying power are not shown.
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[0035]
The main control unit 65 is constituted by a CPU that performs substantial control regarding the
game according to the game situation, a ROM storing control programs executed by the CPU, and
a RAM capable of reading and writing data as needed. .
The internal configuration of the main control unit 65 is not shown.
[0036]
The main control unit 65 includes a switch detection circuit 66, a solenoid drive circuit 67, an
LED drive circuit 68, a motor drive circuit 69, a lamp drive circuit 70, a lamp drive circuit 71, an
LED drive circuit 72, an information output circuit 73, and a sub control unit 74 are connected.
[0037]
The switch detection circuit 66 includes a starting opening winning detection switch SW1 for
detecting a pachinko ball winning in the starting winning opening 17, a left gate switch SW2 for
detecting that the gaming ball has passed through the left gate 15, a game A right gate switch
SW3 for detecting that the ball has passed the right gate 16, a special winning opening winning
detection switch SW4 for detecting a pachinko ball that has won the special winning opening 50
of the character unit 18, a special winning opening Specific area passage detection switch SW5
for detecting a pachinko ball that has won in a specific area 53 in 50, and a winning detection
switch SW6 for detecting a pachinko ball that has won in a regular winning opening 21 set at 8
pieces It is connected, and it is comprised so that the state of each switch SW1-SW4 may be
simultaneously input into the main control part 65. FIG.
[0038]
The solenoid drive circuit 67 includes a normal electric combination release solenoid 60 for
opening the start winning opening 17, a special winning opening opening solenoid 61 for
opening and closing the opening and closing door 51 of the combination unit 18, and a specific
area 53. It is connected to a specific area door opening solenoid 62 for driving to open the
closing door.
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The solenoid drive circuit 67 operates the solenoids 60 to 62 individually at a predetermined
timing in response to a command signal from the main control unit 65.
[0039]
The LED drive circuit 68 drives to display the normal symbol display 34 according to the control
signal from the main control unit 65, and also lights and drives the stored number display LED
35 for the normal symbol and the stored number display LED 41 for the special symbol. It is a
circuit.
[0040]
The motor drive circuit 69 is connected to an induction member drive motor MT for moving the
induction members 42 up and down.
The induction member drive motor MT is configured of a stepping motor.
The motor drive circuit 69 rotationally drives the induction member drive motor MT so as to
move the induction members 42, 42 up and down 15.3 times per minute in accordance with the
control signal from the main control unit 65.
[0041]
The special symbol display device 30 includes a symbol display CPU (not shown), a memory, etc.
(not shown), and is connected so as to be able to transmit data in one direction from the main
control unit 65 to the special symbol display device 30 The left symbol, the middle symbol, the
right symbol, and the moving image are displayed on the display unit 44 according to the display
command data transferred from the main control unit 65.
[0042]
The lamp drive circuit 70 is connected to a frame decoration lamp A1, a frame decoration lamp
A2 and a frame decoration lamp A3 shown in FIG.
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The lamp driving circuit 70 controls lighting of the frame decoration lamps A1 to A3 in
accordance with a control signal from the main control unit 65.
[0043]
The lamp drive circuit 71 is connected to the decorative lamps C1, D1, E1, F1 shown in FIG. The
lamp driving circuit 71 individually controls lighting of the decorative lamps C1, D1, E1, and F1
in accordance with a control signal from the main control unit 65.
[0044]
The LED drive circuit 72 includes the decorative LEDs (Q1) and (Q2) shown in FIG. 3, the
decorative LEDs (J1), (K1), (H1), (H2), and (H3), and the decorative LEDs (M1 to M8) and the
decoration LEDs (N1 to N8) are connected. The LED drive circuit 72, according to the control
signal from the main control unit 65, decoration LED (Q1), (Q2), decoration LED (J1), (K1), (H1),
(H2), (H3), Lighting control of decoration LED (M1-M8) and decoration LED (N1-N8) is carried
out separately.
[0045]
The sub control unit 74 mainly performs control relating to sound effect output according to the
status data representing the gaming state of the pachinko machine sent from the main control
unit 65, and performs control relating to lending of pachinko balls and payout of prize balls. It is.
The sub control unit 74 is configured of a CPU for substantially controlling pachinko ball lending
and prize ball dispensing, a ROM storing control programs executed by the CPU, and a RAM
capable of reading and writing data as needed. It is done. The internal configuration of the sub
control unit 74 is not shown.
[0046]
The sub control unit 74 is connected to the main control unit 65 so as to be able to transfer data,
and in a normal state, data transfer from the main control unit 65 to the sub control unit 74 is
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performed in only one direction. When the fraud detection is detected, the fraud detection signal
is sent from the sub control unit 74 to the main control unit 65. Further, the sub control unit 74
includes an LED drive circuit 75, a lamp drive circuit 76, a switch detection circuit 77, an audio
drive circuit 78, a solenoid drive circuit 79, an information output circuit 73, a prize ball
discharge device 80, and a hit ball discharge device 81, The card interface 82 is connected.
[0047]
The data transferred from the main control unit 65 to the sub control unit 74 is status data
indicating the gaming state of the pachinko machine and payout number data of prize balls
corresponding to winning of the pachinko ball.
[0048]
In response to the command signal from the sub control unit 74, the LED drive circuit 75
controls the lighting of the payout LED (P1) and the out-of-ball LED (P2) of FIG.
The lamp driving circuit 76 receives the command signal from the sub control unit 74 and
controls lighting of the key decoration lamp B1.
[0049]
The switch detection circuit 77 includes a metal frame open detection switch 84 for detecting the
opening of the metal frame 6, a supply ball breakage detection switch 85 for detecting the ball
breakage of the ball tank, and a safe ball detection for detecting the safe ball. A detection signal
of the switch 63 (see FIG. 6) is input to the sub control unit 74.
[0050]
The voice drive circuit 78 includes a voice synthesis circuit to be described later and an amplifier
for sound amplification, and synthesizes voice data in response to a command output from the
sub control unit 74 in response to status data indicating the gaming state of the pachinko
machine It reproduces | regenerates and amplifies this and it outputs as an effect sound from
speaker 11a, 11b.
[0051]
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In response to the payout control signal output from the sub control unit 74, the prize ball
discharging device 80 discharges the pachinko balls of the number according to the ball lending,
and pays out 6 pieces, 8 pieces, and 15 pieces of prize balls. Do each one.
The ball hitting and launching device 81 operates in response to the drive signal output from the
sub control unit 74, and bounces the pachinko ball toward the game board 5 surface.
The operating state of the hitting and launching apparatus 81 is input to the sub control unit 74.
[0052]
The card interface 82 is connected to the ball lending operation unit 83 provided on the front
surface of the card unit 3 and the upper tray 8 of FIG. 1 and receives the money amount
information sent from the card unit 3 and the ball lending input from the ball lending operation
unit 83 The information is output to the sub control unit 74, and the ball lending completion
signal sent from the sub control unit 74 is output to the card unit 3.
[0053]
The information output circuit 73 is a circuit for outputting the information data output from the
main control unit 65 and the information data output from the sub control unit 74 to a hall
computer or the like as a host computer.
[0054]
Information data output from the main control unit 65 is information indicating a big hit state
from big hit start to big hit end (high level from big hit start to big hit end), big hit state from big
hit start to big hit end and high probability Information (high level during the period from the big
hit start to return to normal probability), information showing the determination of the special
symbol (high level for a predetermined time each time the special symbol is stopped),
information showing the winning of the specific area 53 (High level for a predetermined time
each time a prize is detected in the specific area 53), information indicating the determination of
a normal symbol (high level for a predetermined time each time a regular symbol is stopped).
[0055]
The information data output from the sub control unit 74 is information indicating occurrence of
ball breakage (high level while the supply ball breakage detection switch 85 is detecting the ball
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breakage state), information indicating unauthorized opening of the metal frame 6 (gold
Representing the prize ball payout (high level during the period when the frame open detection
switch 84 detects the open state of the metal frame 6), showing the prize ball payout (high level
for a predetermined period of time every 10 prize balls are expelled), Information (high level for
a predetermined period of time every twenty-five prize balls discharged corresponding to the ball
lending operation) is transferred, and the operation stop signal of the bat firing device 81 is
transferred from the hall computer side to the sub control unit It is input to 74.
[0056]
Next, the audio drive circuit 78 of this embodiment will be described.
FIG. 10 is a circuit block diagram of the audio drive circuit 78. As shown in FIG.
The speech drive circuit 78 is constituted by a speech synthesis control IC 86 constituting a
speech synthesis circuit and amplifiers 87 and 88 to which a speech synthesis signal synthesized
by the speech synthesis control IC 86 is given.
[0057]
Further, the voice synthesis control IC 86 performs performance data storage means including
performance data ROM 95 storing performance data, and voice reproduction for sequentially
reading performance data from the performance data ROM 95 in accordance with an instruction
from the sub control unit 74 and reproducing and outputting it. A unit 89, electronic volumes 96
and 97, a two-channel digital mixer 98, a D / A converter 99, a mix level controller 100, a reset
signal input unit 101, and a clock frequency input unit 102 are integrally included.
[0058]
Further, the voice reproducing means 89 comprises a tone generator controller 90 for playing a
tone, a sequencer 91 and a sequencer 92 for sequentially reading out tone data stored in the
performance data ROM 95 and providing the tone generator controller 90, and performance
data. The ADPCM controller 93 for sequentially reading out ADPCM (Adaptive Differential Pulse
Code Modulation) sound data stored in the ROM 95 and reproducing it as sound, the sequencer
91, the sequencer 92, the ADPCM controller and the command given from the sub control unit
75 93, and a CPU interface 94 for giving to the mix level controller 100.
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[0059]
The reset signal input unit 101 is for resetting the voice control IC 86 in response to a reset
signal from the sub control unit 74 being input.
It is reset when the power is turned on.
The clock frequency input unit 102 is for inputting a clock signal used by the voice control IC 86,
and a crystal oscillation circuit (not shown) is connected.
[0060]
FIG. 11 is a memory map showing a storage state of data for speech synthesis stored in the
performance data ROM 95. As shown in FIG.
The performance data ROM 95 has a storage capacity of 2 megabytes in total, and the start
address table of the ADPCM sound from number 1 to number 63 is from address 0000C1 to
000180 at address 000000 (hexadecimal display) to 0000C0. The ADPCM sound number 1 to
number 63 end address table, the address 000181 to 00023F, the song number 1 to number 63
start address table, the address 00240 to 03FFF1 the ADPCM sound data And music data are
stored respectively.
[0061]
FIG. 12 is a diagram showing the configuration of one sound of ADPCM sound data.
One ADPCM sound data is composed of 4 bits, and two sampling times are treated as one data.
Then, n pieces of ADPCM sound data are sequentially stored from the start address AS to the end
address AE.
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[0062]
FIG. 14 is a diagram showing the configuration of one song of song data. The tune data is
configured as one block of three bytes in which one byte of each of the step, the register address
and the register data is set. The step is a wait time until the next block is read, and (wait time) =
(step setting value) × (minimum step time). The minimum step time is set by the tempo control
register of the sequencer described later. The register address is a setting address of each setting
register in the sound source controller 90 described later. The register data is setting data to be
set in each setting register in the sound source controller 90 described later designated by the
register address.
[0063]
FIGS. 15 to 16 are register maps of various setting registers provided in the sound source
controller 90. FIG. The tone source controller 90 is for mixing a tone generator made of a total of
three channels of channels 1A, 1B, 1C, a noise generator, a tone made by the tone generator and
a noise made by the noise generator. A tone generator of a first system including a mixer and an
envelope generator for producing an envelope of an output level by changing the output of the
mixer, and a tone generator of a total of three channels 2A, 2B and 2C. And a noise generator, a
mixer for mixing a musical tone generated by the musical tone generator and a noise sound
generated by the noise generator, and an output level envelope is generated by changing the
output of the mixer. And an envelope generator, and two systems with a second system sound
source controller.
[0064]
Then, the sound source controller 90 operates the sound source controller of the first system and
the sound source controller of the second system simultaneously to simultaneously generate up
to 2 simultaneous music pieces from the music data of up to 63 music stored in the performance
data ROM 95. It is possible to play.
[0065]
As shown in FIGS. 15 to 16, the tone generator controller of the first system of the tone
generator controller 90 has 8-bit configuration setting registers AOA1, AOA2, AOB1 and AOB2
for setting the playback conditions when playing back tone data. , AOC 1, AOC 2, ANO 1, AMI 1,
AOA 3, AOB 3, AOC 3, AOC 3, AEN 1, AEN 2, AEN 3, AOA 4, AOB 4, AOC 4, and the tone
generator controller of the second system similarly reproduces the reproduction conditions for
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reproducing the musical tone data. Each setting register has setting registers BOA1, BOA2, BOB1,
BOB2, BOC1, BOC2, BNO1, BMI1, BOA3, BOB3, BOC1, BEN1, BEN2, BEN2, BEN3, BOA4, BOB4
and BOC4.
[0066]
Next, each setting register will be described with reference to FIG. 17 to FIG.
Note that since the sound source controller of the first system and the sound source controller of
the second system have the same configuration, only the contents of each setting register will be
described for the first system, and the description for the second system will be omitted. .
[0067]
As shown in FIG. 17, the setting registers AOA1 and AOA2 are registers for setting the tone
frequency generated by the tone generator of channel A in the tone generator controller of the
first system, and the setting register AOA1 and the setting register AOA2 form a pair. Set one
frequency.
Using D7 (bit 7) to D0 (bit 0) of setting register AOA1 as TP7 to TP0, and using D3 (bit 3) to D0
(bit 0) of setting register AOA2 as TP11 to TP8, respectively D7 (bit 7) to D4 (bit 4) are not used.
[0068]
The tone frequency ft produced by the tone generator is ft = (basic frequency) / (16TP) MHz. た
だし、
TP=(TP11×2048)+(TP10×1024)+(TP9×512)+(TP8×2
56)+(TP7×128)+(TP6×64)+(TP5×32)+(TP4×16)+(T
P3×8)+(TP2×4)+(TP1×2)+TP0である。
[0069]
The tone frequency generated by the tone generator of channel C in the tone generator
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18
controller of the first system and setting registers AOB1 and AOB2 for setting the tone frequency
of the tone generator of channel B in the tone generator controller of the first system is also set.
The configuration is similar for the setting registers AOC1 and AOC2.
[0070]
Furthermore, the setting registers BOA1 and BOA2, BOB1 and BOB2 and BOC1 and BOC2 having
similar configurations are used to set tone frequencies generated by the tone generators of
channels A, B and C in the tone generator controller of the second system.
[0071]
As shown in FIG. 18, the setting register ANO1 is a register for setting the noise frequency
generated by the noise generator in the sound source controller of the first system, and D4 (bit 4)
to D0 (bit 0) of the setting register ANO1. It is used as NP4 to NP0, respectively, and D7 (bit 7) to
D5 (bit 5) of the setting register ANO1 are not used.
[0072]
The frequency fn of the noise produced by the noise generator is fn = (basic frequency) / (16 NP)
MHz.
ただし、
NP=(NP4×16)+(NP3×8)+(NP2×4)+(NP1×2)+NP0である。
Further, the configuration is the same for the setting register BNO1 for setting the noise
frequency generated by the noise generator in the sound source controller of the second system.
[0073]
As shown in FIG. 19, the setting register AMI1 is a register for setting whether or not to output a
tone (tone) and noise for each of the channels A, B and C in the tone generator controller of the
first system. Since D5 (bit 5) to D3 (bit 3) of AMI1 are for noise, they are set to channel C,
channel B, and channel A, respectively, and D2 (bit 2) to D0 (bit 0) are for musical tone. , D7 (bit
7) to D6 (bit 6) of the setting register ANO1 are not used.
10-04-2019
19
[0074]
It becomes an output when the value of the corresponding bit of each channel is 0, and it
becomes a mixing output when both noise and tone are 0, and sets the volume to be described
later when both noise and tone are 1. The volume level set in the setting registers AOA3 to AOC3
is output.
[0075]
Further, in the tone generator controller of the second system, a setting register BMI1 for setting
whether to output a tone (tone) and noise for each of the channels A, B and C is also similar to
the setting register AMI1.
[0076]
As shown in FIG. 20, the setting register AOA3 is a register for setting the volume of the channel
A in the sound source controller of the first system, where D4 (bit 4) of the setting register AOA3
is M, and D3 (bit 3) to D0. (Bit 0) is used as L3 to L0, respectively, and D7 (bit 7) to D5 (bit 5) of
the setting register AOA3 are not used.
[0077]
The volume level to be set can be set to one of 16 stages from 0 to 15 by 4-bit data of L4 to L0
when M = 0.
Also, in the case of M = 1, it can be set in 32 stages of 0 to 31 by 5-bit data of E4, E3, E2, E1, E0
created by the envelope generator, but E4, E3. , E2, E1, and E0 change with time, so that the
variable volume setting is made.
[0078]
The setting register AOB3 for setting the volume of the channel B in the sound source controller
of the first system and the setting register AOC3 for setting the volume of the channel C in the
sound source controller of the first system have the same configuration as the setting register
AOA3.
[0079]
Furthermore, the same configuration is applied to the setting registers BOA3, BOB3 and BOC3
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20
for setting the volumes of the channels A, B and C in the sound source controller of the second
system.
[0080]
As shown in FIG. 21, the setting registers AEN1 and AEA2 are registers for setting the repetition
frequency of the envelope in the sound source controller of the first system, and the setting
register AEN1 and the setting register AEN2 set one frequency in a pair.
Let D7 (bit 7) to D0 (bit 0) of the setting register AEN1 be EP7 to EP0, and D7 (bit 7) to D0 (bit 0)
of the setting register AEN2 be EP15 to TP8, respectively.
[0081]
The repetition frequency fe of the envelope is fe = (basic frequency) / (256 EP) MHz.
ただし、
EP=(EP15×32768)+(EP14×16384)+(EP13×8192)+(E
P12×4096)+(EP11×2048)+(EP10×1024)+(EP9×512)
+(EP8×256)+(EP7×128)+(EP6×64)+(EP5×32)+(EP4
×16)+(EP3×8)+(EP2×4)+(EP1×2)+EP0である。
[0082]
Further, the setting registers BEN1 and BEN2 for setting the repetition frequency of the envelope
in the sound source controller of the second system are also similar in configuration to the
setting registers AEN1 and AEN2.
[0083]
As shown in FIG. 22, the setting register AEN3 is a register for setting the shape of the envelope
in the sound source controller of the first system, and D3 (bit 3) to D0 (bit 0) of the setting
register AEN3 are 4-bit data. Used and D7 (bit 7) to D4 (bit 4) of the setting register AEN3 are
10-04-2019
21
not used.
The shape of the envelope to be set is as shown in FIG.
[0084]
The setting register BEN3 for setting the shape of the envelope in the sound source controller of
the second system also has the same configuration as the setting register AEN3.
[0085]
As shown in FIG. 23, the setting register AOA4 is a register for setting the panpot (localization) of
the channel A in the sound source controller of the first system, and D3 (bit 3) to D0 (bit 0) of the
setting register AOA4. It is used as 4-bit data, and D7 (bit 7) to D4 (bit 4) of the setting register
AOA4 are not used.
[0086]
As for the localization that can be set, when D3 to D0 are "1000" in 16 steps, localization is at the
center, and when D3 to D0 is "0000", mute is performed.
In addition, the ratio allocated to the left and right channels at the time of output is as shown in
FIG.
[0087]
The setting register AOB4 for setting the panpot of channel B in the sound source controller of
the first system and the setting register AOC4 for setting the pan pot of channel C in the sound
source controller of the first system have the same configuration as the setting register AOA4. .
[0088]
Furthermore, the configuration is the same for the setting registers BOA4, BOB4 and BOC4 for
setting the panpots for the channels A, B and C in the sound source controller of the second
system, respectively.
10-04-2019
22
[0089]
FIG. 24 is a register map of various setting registers provided in the ADPCM controller 93.
The ADPCM controller 93 has a sound designation register for specifying the ADPCM sound
(number 1 to number 63) set in the performance data ROM 95, a volume setting register for
setting the volume, and panpot setting. These channels consist of one panpot setting register, one
on / off register for designating reproduction start and reproduction stop, and one repetition
setting register for setting reproduction repetition, and one channel for reproducing ADPCM
sound data. , Eight channels from channel 1 to channel 8, and eight tones can be simultaneously
reproduced as ADPCM sounds.
[0090]
Next, setting registers for setting ADPCM sound reproduction conditions in individual channels
will be described with reference to FIGS. 25 to 28. FIG.
Since the configuration of each setting register from channel 1 to channel 8 is the same, only
each setting register PA1, PA2, PA3, PA4 of channel 1 will be described as a representative, and
setting register PB1, PB2, PB3, channel 2 will be described. The description of the setting
registers PH1, PH2, PH3 and PH4 of PB4 to channel 8 will be omitted.
[0091]
As shown in FIG. 25, the setting register PA1 uses D7 (bit 7) to D6 (bit 6) as 2-bit data for
frequency setting, and D5 (bit 5) to D0 (bit 0) Used as ADPCM sound number specification as bit
data.
[0092]
The settable frequencies are 32 kHz for D7 = 1, D6 = 1, 16 kHz for D7 = 1, D6 = 0, 8 kHz for D7
= 0, D6 = 1, D7 = 0, D6 = 0. In the case it is 4kHz.
10-04-2019
23
In addition, as the ADPCM sound number, one in the range of 1 to 63 can be selected and
specified.
[0093]
As shown in FIG. 26, the setting register PA2 is a register for setting the volume, and D3 (bit 3) to
D0 (bit 0) are used as 4-bit data for setting the volume, and D7 (bit) 7) to D4 (bit 4) are not used.
The volume that can be set can be set in 16 steps in the range of 0 to 15. In the case of 0, the
volume is muted, and in the case of 15, the volume is maximum.
[0094]
As shown in FIG. 27, the setting register PA3 is a register for setting the panpot, and D3 (bit 3) to
D0 (bit 0) are used as 4-bit data for setting the panpot, and D7. (Bit 7) to D4 (Bit 4) are not used.
The settable localization can be set in 16 steps. When D3 to D0 is "1000", the localization is at
the center, and when D3 to D0 is "0000", mute is performed.
[0095]
As shown in FIG. 28, the setting register PA4 uses D1 (bit 1) for reproduction start / stop control
and D0 (bit 0) for repetitive reproduction setting, and D7 (bit 7) to D2 (Bit 2) is not used.
When D1 = 1, the reproduction is started, and when D1 = 0, the reproduction is stopped.
In addition, when D0 = 1, the reproduction is repeated, and when D0 = 0, the reproduction is
performed only once.
[0096]
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24
FIG. 29 is a register map of the sequencer 91, various setting registers provided in the sequencer
92, and setting registers provided in the mix level controller 100.
Since each configuration of setting registers SR1, SR2, SR3 and SR4 of sequencer 91 and each
configuration of setting registers SS1, SS2, SS3 and SS4 of sequencer 92 are the same, setting
registers SR1, SR2 and SR3 of sequencer 91 are used. And SR4, and the description of the
sequencer 92 is omitted.
[0097]
As shown in FIG. 30, the setting register SR1 uses D7 (bit 7) for musical performance start / stop
control and D6 (bit 6) for musical repeat setting, and D5 (bit 5). ) To D0 (bit 0) are used as 5-bit
data for specifying a music number.
[0098]
The performance starts when D7 = 1 and stops when D7 = 0.
In addition, when D6 = 1, the performance is repeated, and when D6 = 0, the performance is
performed only once. As the tune sound number, one in the range of 1 to 63 can be selected and
specified.
[0099]
As shown in FIG. 31, the setting register SR2 is a register for setting the minimum step time for
determining the tempo of performance, and D5 (bit 5) to D0 (bit 0) are respectively TMP5,
TMP4, TMP3, TMP2, TMP2, TMP1, TMP1. Used as TMP0, and D7 (bit 7) to D6 (bit 6) of the
setting register SR2 are not used.
[0100]
Assuming that inverted data of each bit data TMP5 to TMP0 is represented as tmp5, tmp4, tmp3,
tmp2, tmp1 and tmp0, respectively, the minimum step time TMP (ms) to be set is TMP = (tmp5
10-04-2019
25
× 4) + (tmp4 ×) 2) + (tmp3 × 1) + (tmp2 × 0.5) + (tmp1 × 0.25) + (tmp0 × 0.125).
ただし、0.125≦TMP≦8である。 The tempo can be changed by rewriting during
performance.
[0101]
As shown in FIG. 32, the setting register SR3 is a register for setting which of the channels 1 to 8
of the ADPCM controller 93 is occupied and used. D7 (7 bits) to D0 (0 bit) of the setting register
SR3 are sequentially set in the occupancy setting flags from channel 8 to channel 1.
[0102]
Then, when the value of each occupancy setting flag is 1, it is occupied and is not used when the
value of the occupancy setting flag is 0. When data is directly written to each setting register
corresponding to channel 1 to channel 8 of the ADPCM controller 93 described above and
reproduction is performed by the ADPCM controller 93, occupation of a channel used in the
setting register SR3 on the sequencer side Do not use the designation.
[0103]
As shown in FIG. 33, the setting register SR4 occupies and uses which of the six channels of the
channels A, B and C of the first system and the channels A, B and C of the second system. It is a
register that sets whether to D5 (5 bits) of setting register SR4 is for occupancy setting of
channel C of the second system, D4 (4 bits) of setting register SR4 is for occupancy setting of
channel B of the second system, D3 (3 bits for setting register SR4 Is for occupancy setting of
channel A of the second system, D2 (2 bits) of the setting register SR4 is for occupancy setting of
channel C of the first system, D1 (1 bit) of the setting register SR4 is for channel B of the first
system. For the occupancy setting, the D0 (0 bit) of the setting register SR4 is set in the
occupancy setting flags for the occupancy setting of the channel A of the first system. Note that
D7 (bit 7) to D6 (bit 6) of the setting register SR4 are not used.
[0104]
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26
Then, when the value of each occupancy setting flag is 1, it is occupied and is not used when the
value of the occupancy setting flag is 0.
[0105]
Note that channels A, B and C of the first system of the sound source controller 90 are occupied
and used by the sequencer 91, and channels A, B and C of the second system of the sound source
controller 90 are occupied and used by the sequencer 92. From the tune data of up to 63 tunes
stored in the performance data ROM 95, up to two tunes can be played simultaneously.
[0106]
FIG. 13 is a diagram showing the contents of the setting register MIX disposed in the mix level
controller 100. As shown in FIG.
The setting register MIX is a register for setting the tone level of the tone generator controller 90
when the tone created by the tone generator controller 90 and the reproduced tone reproduced
by the ADPCM controller 93 are mixed.
D3 (bit 3) to D0 (bit 0) of the setting register MIX are used as mix3, mix 2, mix 1 and mix 0,
respectively, and D7 (bit 7) to D4 (bit 4) of the setting register MIX are not used.
[0107]
The mixing ratio MIX of the musical tone from the configurable sound source controller 90 to
the volume of the ADPCM controller 93 is MIX = (mix3 / 4) + (mix / 8) + (mix1 / 16) + (mix0 /
32). The maximum volume of the tone from the tone source controller 90 is 15/32 with respect
to the maximum volume of the ADPCM controller 93.
[0108]
Next, with reference to FIG. 10, the reproduction operation of the musical tone and ADPCM
sound of the IC 86 for speech synthesis control by the sub control unit 74 will be described. In
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27
addition, the sound effect generated according to the gaming state, as an example, in the symbol
display device 46 the left symbol and the right symbol stop with the same symbol, there is a
possibility of becoming a big hit by the stop symbol of the middle symbol The following
description will be made as sound effects (song number 4 and drum sound) to be emitted when
the player is in a state (hereinafter referred to as reach).
[0109]
The sub control unit 74 transmits a command corresponding to the reach occurrence to the voice
synthesis control IC 86. First, the sub control unit 74 transmits a command of “start the
performance of the melody of the music number 4” to the voice synthesis control IC 86.
Specifically, the command designates the address of each setting register of the sequencer 91 in
the CPU interface 94, and transmits the setting data to be written in the sequencer 91.
Thereafter, data to be set by addressing is transmitted to the mix level controller 100. The setting
data to be written to the sequencer 91 is data to be written to the setting registers SR1 to SR4 of
the sequencer 91, and the data to be set to the mix level controller 100 is tone level data to be
written to the setting register MIX.
[0110]
In the setting register SR1, the performance start / stop setting flag is set to a value 1 defining
the performance start, the performance repeat setting flag to a value 1 defining the performance
repeatedly, and data "000100" specifying the number 4 as music number specification data Do.
[0111]
Although the specific value of the minimum step time for determining the performance tempo is
unknown, the setting data is set in the setting register SR2 so as to satisfy 0.125 ≦ TMP ≦ 8.
[0112]
In this case, since the musical tone data is generated to the tone generator controller 90 in the
setting register SR3, the designation of the occupied channel to the ADPCM controller 93 is not
performed. Set ".
[0113]
In this case, since the tone reproduction is performed by occupying and using the channels A, B,
and C of the tone generator controller of the first system, data "00000111" defining the setting
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28
register SR4 is set.
[0114]
When the CPU interface 89 designates the sequencer 91 from the sub control unit 74, the setting
contents of the command to start the performance of the melody of the music number 4 sent
from the sub control unit 74 are sequentially set in each setting register of the sequencer 91.
Write to
[0115]
The sequencer 91 reads the music data of the music number 4 one block at a time from the
performance data ROM 95 in response to the command of "start the performance of the melody
of the music number 4" (see FIG. 14). The register data of the music piece data are sequentially
written in the setting registers AOA1 to AOC1 of the tone generator controller 90 corresponding
to the register addresses of (1) (see FIG. 15).
[0116]
The tone source controller 90 produces a tone at a tone frequency set by data separately written
for each of the channels A, B, and C, and also sets the tone volume, envelope frequency, envelope
shape, and pan of the tone. While digital reproduction is performed according to the pot, noise is
generated at a set noise frequency, musical tones and noise are mixed based on the set mix
designation, and are output to a 2-channel digital mixer 98 via an electronic volume 96.
[0117]
Further, although the specific numerical value of the tone level data to be written in the setting
register MIX of the mix level controller 100 is unknown, it becomes any of 0 (silence) to 15
(maximum volume).
[0118]
At this point, it is assumed that the ADPCM controller 93 has not played back the ADPCM sound.
Therefore, there is no output of the reproduction sound of the ADPCM controller 93.
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29
The 2-channel digital mixer 98 mixes the digital musical tone sent from the tone generator
controller 90 with the digital reproduced tone sent from the ADPCM controller 93 by the value
of the musical tone level data written in the setting register MIX of the mix level controller 100.
And output to the D / A converter 99.
In this case, only digital musical tones sent from the tone generator controller 90 are output to
the D / A converter 99.
[0119]
The D / A converter 99 analog-converts the mixed digital sound output from the two-channel
digital mixer 98, distributes it to the left and right terminals in an analog switching system, and
applies it to the left and right amplifiers 87 and 88.
Also, the amplifiers 87 and 88 amplify the voice synthesis signal and generate stereo voice
(music number 4 musical tone) from the speakers 11a and 11b shown in FIG.
[0120]
The tone levels of channels A, B, and C are changed by changing the panpot data set in setting
registers AOA4, AOB4, and AOC4 (see FIG. 23), and the output levels of the left and right
channels at the time of output are made a predetermined amount. The sound source localization
can be moved forward or backward by changing the sound source localization to the center, to
the left or to the right, and changing the volume according to the repetition frequency and
envelope shape of the envelope set in the setting registers AEN1 to AEN3. By combining and
changing these, it is possible to generate a sound effect such that sound source localization
circulates around the player.
[0121]
As described above, while the stereo sound (musical tone No. 4 musical tone) is being generated
from the speakers 11a and 11b, the sub-control unit 74 generates a voice command of "generate
a drum sound (voice C)". It transmits to the synthesis control IC 86.
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30
The reproduction sound is reproduced from the channel 1 of the ADPCM controller 93.
Specifically, the command designates the address of each setting register of the ADPCM
controller 93 in the CPU interface 94, and transmits setting data to be written.
The setting data is data to be written in the setting registers PA1 to PA4 of the ADPCM controller
93.
[0122]
In the setting register PA1, data "01" for designating a frequency of 8.0 kHz and data "000011"
for defining the ADPCM sound number 3 of the voice C are set.
[0123]
Data (one of 0 to 15) for determining the volume is set in the setting register PA2.
Further, data (any one of the data shown in FIG. 27) for setting the panpot is set in the setting
register PA3.
Further, in the setting register PA4, a value 1 defining the reproduction start is set in the
reproduction start / stop setting flag, and a value 0 defining the reproduction one time is set in
the reproduction repetition setting flag.
[0124]
The CPU interface 89 sequentially receives a command of "generate a drum sound" sent from the
sub control unit 74 when the ADPCM controller 93 is designated from the sub control unit 74
sequentially with each setting register PA1 to PA4 of the ADPCM controller 93. Write to
[0125]
The ADPCM controller 93 reads out ADPCM sound data of ADPCM sound number 3 from the
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31
performance data ROM 95 one byte at a time in response to the command "generate drum
sound" (see FIG. 12), and also sets the frequency, volume, Reproduction is performed according
to the ADPCM method according to the pan pot, and the reproduced digital reproduction sound
is output.
The digitally reproduced sound output from the ADPCM controller 93 is input to the two-channel
digital mixer 98 via the electronic volume 97.
[0126]
The 2-channel digital mixer 98 mixes the digital musical tone sent from the tone generator
controller 90 with the digital reproduced tone sent from the ADPCM controller 93 by the value
of the musical tone level data written in the setting register MIX of the mix level controller 100.
And output to the D / A converter 99.
[0127]
The D / A converter 99 analog-converts the mixed digital musical tone and digital reproduction
sound output from the two-channel digital mixer 98, distributes them to the left and right
terminals in an analog switching system, and applies them to the left and right amplifiers 87 and
88.
Also, the amplifiers 87 and 88 amplify the voice synthesis signal and generate stereo voice
(music number 4 musical tone) from the speakers 11a and 11b shown in FIG.
[0128]
As a result, a drum sound is emitted once, overlapping the tune No. 4 at the time of reach being
played from the speakers 11a and 11b.
[0129]
The performance stop of the music is stopped by writing the value 0 which defines the stop in
the performance start / stop setting flag of the setting register SR1 of the sequencer 91.
[0130]
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32
Next, an output and display operation of sound effects and sounds produced according to the
operating state of the pachinko machine 1 of the embodiment will be described.
34 to 35 are diagrams showing the correspondence between the operating state of the pachinko
machine 1 and the output display operation of sound effects and sounds.
Also, FIGS. 36 to 38 are diagrams showing actuation timings and operation ranges of types of
sound effects and sounds.
[0131]
When the pachinko machine 1 is powered on, the left, middle and right symbols of the special
symbol display device 30 display "3", "5" and "7", respectively, The picture is displayed, and the
normal graphic display 34 displays "0".
Moreover, memory number display LED35 and 41, frame decoration lamp A1-A3, decoration
lamp C1, D1, E1, F1, decoration LED (J1), (K1), (H1), (H1), (H2), (H3), decoration LED All of (M1
to M8), decoration LED (N1 to N8), payout LED (P1) and out-of-ball LED (P2) are extinguished.
The induction member drive motor MT is driven to rotate, and the induction members 42 and 42
move up and down 15.3 times per minute.
[0132]
When a player inserts a prepaid card into the card insertion slot 3a of the card unit 3 and
operates the ball lending operation unit 83, a predetermined number of pachinko balls are
discharged from the prize ball discharging device 80 according to the operation and are stored
on the upper tray 8 It will be loaned out. Then, when the player turns the ball striking handle 10,
the ball striking device 81 is activated, and the pachinko ball is shot toward the game board 5
surface. When the ball striking device launcher 81 is actuated, the actuation state is detected by
the sub control unit 74, and the key decoration lamp B1 is turned on. The key decoration lamp
B1 is always turned on while the bat firing device 81 is in operation.
10-04-2019
33
[0133]
When the gaming ball passes either of the left and right gates 15 and 16, passage of the gaming
ball is detected by either the left gate switch SW2 or the right gate switch SW3. The pachinko
balls that have entered the left and right gates 15, 16 return from the ball outlets 40a, 40b to the
game board 5 side.
[0134]
When passage of the pachinko ball to the left and right gates 15 and 16 is detected, the symbol
of the normal symbol display 34 starts to fluctuate, and the fluctuation of the symbol stops after
approximately 6.0 seconds. When passage of the pachinko ball to the left and right gates 15 and
16 is newly detected during pattern change of the normal symbol display 34, the gate passage is
stored up to four at the same time, and the number of stored memories is for ordinary symbols.
The number of lamps is displayed by the memory number display LEDs 35a to 35d. The lighting
order is the order of the LED 35a, the LED 35b, the LED 35c, and the LED 35d.
[0135]
Then, when the normal symbol whose fluctuation has been stopped is one of “1”, “3”, “5”,
“7” and “9”, the normal motorized character release solenoid 60 is operated and its winning
opening (start The winning opening) 17 opens for a predetermined time. In addition, when the
lottery probability of the start winning opening 17 is the normal probability, the opening time of
the starting winning opening 17 is expanded for 0.3 seconds, and the winning probability of the
big hit related to the starting winning opening 17 is When the probability is high, the expansion
is performed three times for 1.7 seconds, but the expansion operation ends when the pachinko
ball is won in the start winning hole 17 during the expansion operation. In addition, the lottery
probability of the big hit concerning the starting winning opening 17 will be described later.
[0136]
When the gaming ball wins the starting winning opening 17, the starting opening winning of the
pachinko ball is detected by the starting opening winning detection switch SW1. When the
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34
starting hole winning of the pachinko ball is detected, the symbols of the special symbol display
device 30 start to change in the order of the left symbol, the right symbol and the middle symbol.
The value of the animation flag is determined at the start of the special symbol variation, and if
the value of the animation flag is 0, the sound effect 1 during the variation of the special symbol
is pronounced while the value of the animation flag is 1 to 5 If sound effect 2 is pronounced, it
sounds until the left symbol stops.
[0137]
In addition, when winning a prize to the starting winning opening 17 of a pachinko ball is newly
detected during symbol variation of a special symbol, a starting opening winning a prize is
memorized to a maximum of four and the memory number is a memory for special symbols. The
number display is performed by the number display LEDs 41a to 41d.
[0138]
A random counter RND1 is used to determine in advance whether or not to generate a big hit in
the variable display results of the special symbol display device 30.
The value of the random counter RND1 is counted up one by one at a predetermined timing in
the range of 0 to 336. Then, the value of the random counter RND1 is read out and stored at the
time of detection of the starting opening winning, and the counter value stored at a
predetermined timing is read out in the period from the start of fluctuation of the symbol to the
stop of the left symbol. The value is compared with the value for the big hit to determine whether
or not the big hit.
[0139]
And when about 5.3 seconds or more have passed since the start of the symbol fluctuation of the
special symbol, the symbols are stopped in the order of the left symbol, the right symbol and the
middle symbol and the symbol is fixed. Reaching occurs when the left symbol and the right
symbol that are fixed and stopped match when the symbol is fixed and stopped.
[0140]
In addition, in the moving image display unit 46 of the special symbol display device 30, 46
types of reach patterns are set according to the types of characters displayed as moving images
and the difference in movement (difference in story development). , And the lamps and LEDs, and
10-04-2019
35
the types of sound effects are the same, and are divided into eight groups of reach division a to
reach division h.
[0141]
Then, a random counter RND3 is used to select one of these reach categories.
The value of the random counter RND3 is counted up one by one at a predetermined timing in
the range of 0 to 7.
Then, the type of reach classification is determined by the value of the random counter RND3 at
the time when it is determined that the reach has occurred when the right symbol is determined
and stopped.
[0142]
When the left symbol, the right symbol and the middle symbol of the special symbol mentioned
above stop, the sound effect 3 sounds once when each symbol stops. However, when the reach
operation is performed, the left symbol and the right symbol sound only when stopped.
[0143]
Hereinafter, only the case where the middle symbol performs the reach operation will be
described. When the left symbol and the right symbol stop and the middle symbol starts the
reach operation, the voice A "reach" is generated after the right symbol stops. Then, the sound
effect 4 at the start of the reach operation starts to sound after the voice A “reach”.
[0144]
When the generated reach pattern is the reach segment a, and the stopped middle symbol is "L",
the re-lottery operation of starting the change of the middle symbol is performed again.
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[0145]
If the generated reach pattern is the reach segment b, a voice F "pyon" is generated, then a voice
C "dawn" is generated, and the sound effect 5 in the first half of the reach segment b starts to
sound next.
And after predetermined time progress, the sound effect 6 of the second half of reach division b
begins to sound next to the sound effect 5, and it sounds until the middle pattern stops. When
the generated reach pattern is the reach segment b, and the stopped middle symbol is "L", the relottery operation of starting the change of the middle symbol is performed again.
[0146]
When the generated reach pattern is the reach divisions c to f, the voice F "pyon" is generated,
and then the sound effect 7 starts to sound until the middle symbol stops. During the generation
of the sound effect 7, the voice G “Gun” is generated twice. Further, in the case of the reach
classifications e and f, when the middle symbol is returned by one symbol, the voice J of "Hy
One" is generated. Moreover, also when the reach pattern which generate | occur | produced is
reach division cf, when the inside symbol stopped is "L", the re-lottery operation which starts the
fluctuation | variation of the inside symbol is performed again.
[0147]
When the generated reach pattern is the reach division g, the voice F "pyon" is generated, then
the sound B "paon" is generated, and then the sound effect 8 starts to sound until the middle
symbol stops . A drum sound "Dan" (sound D) and a drum sound "Dan" (sound E) are generated
superimposed on the sound effect 8.
[0148]
If the generated reach pattern is the reach division h, a voice F "Pyon" is generated, then a voice
B "Porn" is generated, and then the sound effect 8 starts to sound, and the moving image
elephant throws a design It sounds until it starts to work. Then, when the elephant of the moving
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image starts an operation of throwing a pattern, the sound effect 9 starts to sound, and sounds
until the middle pattern stops. A drum sound "Dan" (sound D) and a drum sound "Dan" (sound E)
are generated superimposed on the sound effect 8. In addition, every time the moving image
elephant throws a pattern, a voice H "Pish" is generated once each. Furthermore, when the
middle symbol is returned by one symbol at the time of the reach division h, the voice I of
"Piyoyoyon" is generated.
[0149]
In addition, when the reach pattern which generate | occur | produced is reach division a, reach
division b, reach division cf, re-lottery operation is performed, but at this time, the sound effect
12 at the time of re-lottery is switched to the screen of re-lottery. It starts to sound after that and
it rings until the middle symbol stops.
[0150]
The combination of left, middle and right symbols stopped being fixed is “111”, “222”,
“333”, “444”, “555”, “666”, “777”, “888”, “999”, In the case of “XXX”,
“YYY”, “ZZZ”, a big hit occurs.
If it is a combination other than the above combination, it will be out.
[0151]
In the case where the middle symbol performs the reach operation and stops for a certain period,
when all the reach patterns come off and stop with the middle symbol, the sound effect 10
sounds and the sound effect 11 sounds after the sound effect 10.
[0152]
Further, when the middle symbol performs the reach operation and the stop is decided, the
sound effect 13 is sounded when the middle symbol stops at the big hit symbol in all the reach
patterns.
[0153]
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When a big hit occurs, the big winning opening 50 is opened in about 20 seconds.
Further, the door of the specific area 53 is opened simultaneously with the opening of the special
winning opening 50.
In the big hit, next to the sound effect 13, the sound effect 14 is sounded until the opening of the
first big winning opening.
[0154]
When ten game balls are won during the opening of the big winning opening 50, the big winning
opening 50 is closed with the tenth winning. If the game ball passes through the specific area 53
during the opening of the special winning opening 50, the door of the specific area 53 is closed,
and after the closing of the special winning opening 50, the special winning opening 50 is
repeated again. Open up. The repeated opening operation of the big winning opening 50 is at
most 16 times including the first opening. At the time of the big hit, the sound effect 15 sounds
from the opening start of the first big winning opening to the opening start of the last big
opening. Then, the sound effect 16 is sounded from the start of the opening of the final big
winning opening until the end of the pause time after the end of opening.
[0155]
Note that the sound effects 16 generated when the special winning opening 50 is opened can
also be more interesting by moving the sound source back and forth, or around the player.
[0156]
Further, when the metal frame 6 is opened due to a fraudulent action, the opening of the metal
frame 6 is detected by the metal frame open detection switch 84, and a detection signal of the
metal frame open detection switch 84 is input to the sub control unit 74.
In response, the sub control unit 84 outputs a fraud detection signal to the main control unit 65.
The main control unit 65 lights the decoration LED (Q1) and the decoration LED (Q2) according
to the fraud detection signal. In addition to the lighting of the decoration LED (Q1) and the
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decoration LED (Q2), if the lottery probability of the big hit concerning the start winning opening
17 is high, the frame decoration lamp A1 and the frame decoration lamp A3 and the frame
decoration The lamp A2 blinks alternately in a cycle of 251 ms. In addition, at the time of
detection of disconnection or short circuit, or detection of movement of the special winning
opening winning combination detection switch, the sound sound 17 sounds and continues to
sound until the abnormality is resolved.
[0157]
According to the pachinko machine of the present invention, the voice drive circuit for outputting
the voice according to the gaming state, the performance data storage means storing the
performance data, and the instruction from the game control unit And a voice synthesis control
IC integrally including voice reproduction means for sequentially reading out performance data
from the performance data storage means and reproducing and outputting the performance data.
Is possible.
[0158]
The sound reproduction means of the voice synthesis control IC has panpot setting means for
moving the sound source localization of the reproduction sound to the left and right, volume
setting means and envelope setting means for moving the sound source localization of the
reproduction sound back and forth Therefore, the voice control can be performed such that the
sound source moves back and forth, right and left, and orbits around the player.
[0159]
Music data and ADPCM sound data are stored in the performance data ROM, and the sound
reproduction means comprises a tone generator controller for reproducing a musical tone based
on the music data, and an ADPCM controller for reproducing ADPCM sound based on ADPCM
sound data. Therefore, it is possible to notify musical tone melody and voice as sound effects.
[0160]
Move the sound source back and forth or left or right around the player, for example, the gaming
state generated in the pachinko machine, the symbol variation in the symbol display device, the
reach condition randomly generated during the symbol variation, the occurrence of a big hit, etc.
By doing this, you can create more excitement.
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