вход по аккаунту



код для вставкиСкачать
Patent Translate
Powered by EPO and Google
This translation is machine-generated. It cannot be guaranteed that it is intelligible, accurate,
complete, reliable or fit for specific purposes. Critical decisions, such as commercially relevant or
financial decisions, should not be based on machine-translation output.
December 1948 p. 20 Inventor's address Gunma Prefecture Kura-gun Oizumi-cho Oji-Sakada
180-3, Patent applicant address Gunma-ken Kura-gun Oizumi-cho Osaka-Sakata 4, Address list of
attached documents ? Japan Patent Office ? Specially Opener 50-93760 internal office serial
number 'El, 41653G now IC 55 specification L name of the invention of load protection circuit
dual power supply system in the system of the system OCL in?? ? ? ? ? ? ? ? ? ? ? ?
? ? ? ? ? ? ? ?Of the output polarity of the output of the amplifier circuit is made forward
to the base of the pair of opposite polarity transistors respectively. ! A relay is connected to one
collector circuit of the pair of different polarity transistors while applying a diode via a diode
111, and the relay is disconnected from the output middle point of the bus full OCL amplifier
circuit by the relay. Load protection circuit, which is characterized by
& Claims
3. Detailed description of the invention, the present invention detects the output midpoint
voltage of a two-voltage type push-pull 0OL (output capacitor) amplification circuit, and the
midpoint voltage fluctuates positively or negatively above a specified value The present invention
relates to a load protection circuit which operates a relay to cut off a load from an amplifier 1
and protect the load. Like Hoku-chi, the 211 ? push-pull 0 Cj L amplifier U path a, the DC It ? at
its output midpoint should in principle be zero, however, drift or vt source voltage fluctuations or
the output stage of the amplifier circuit The voltage at the output midpoint fluctuates due to the
variation of each element of the element, and a direct current flows to the load such as a single
force, which is not only undesirable in sound terms, but also when the direct current is too large.
This results in damage to the load. Therefore, the DC voltage at the output midpoint of the
amplifier circuit is detected, and if the DC voltage is not zero but has a positive value or a shell
value, then the relay is operated to continuously cut off the load from the amplifier circuit and
the load Protection from destruction and C is the place of the uninvention. A load protection
circuit according to a first embodiment of the present invention will be described below with
reference to the drawings. In the figure, (l) is 2 1! In the source type push-pull 00L amplifier
circuit, (2) is a driver driver, (3), (4), (5), and (6) is an output transistor connected in series with
fM. The collector of the output traffic EndPage: 1 (4) is connected to the positive electrode # (7)
and to the power source (8) of the collector of the output transistor (6), and the middle radiators
(4) and (6) The output center point Avc + mw is output via the output resistance (9) and ?G,
respectively. Also, a shell is a shellfish and it is connected to the output midpoint A via a relay
point a3 of the relay 1121. Furthermore, in the u411a load protection circuit, a pair of different
polarity transistors consisting of NpN'5 rush resistor 1 bright and PNPF rush noise OI are
connected in series, and the NPN lid bias is a current limiting resistor. It is connected to the
positive power source (7) through 7 ? i and relay 115, and is followed by the power source (3)
of the collector ? shell of PJP transistorist lJe. The above-mentioned NPJ ?: / distor L1? is
connected between the base and ground of the first resistor rt, and the second resistance a ? is
connected between the base of the P'NP transistor aa ? and the ground. The cathode of the first
diode (1) is connected to the base of the NPN transistor (d), and the anode of the second diode q
is connected to the base of the PNP transistor ?Q.
Integral l! Connected in common to the seventh node of the first diode (e) and the cathode of the
second tiet e? and consisting of a resistor and a capacitor. 1) The output middle point of the
path 0) and the load (normally open contact connected between the publication) are opened to
the change of the middle point voltage vJPF. In addition, the integration circuit W is inserted to
integrate and extinguish an alternating current which is not directly related to the detection of
the middle point voltage fluctuation among the output signals of 1iA during output. Next, the
operation will be described. Is the human power signal applied to the push-pull OC1 of the twolens source system and the signal input terminal of the amplifier circuit (1) amplified by the
driver driver (2) in Aya? '! t, BM is amplified by the output transistors (3) and (4) through the
positive signal diode (i) and the output midpoint A [given, the negative signal is output transistors
(5) and (6) It is amplified by class B and given an output midpoint AK. These output midpoint AK
given signals are applied to the load (b) through the normally closed contact (d), and for example,
if a power is added as ITi'I distributed load ?M, A voice is generated from one power. At that
time, the DC potential at the output midpoint A is displaced to the positive C1 shell due to some
cause, and a direct current flows through some negative ones, which not only prevents correct
sound # reproduction, but it is terrible In this case, there is a risk that the load IJI) will be
destroyed. Therefore, if the DC potential of output middle point A is zero, for example, the output
of integrating circuit 1 becomes zero, but the output potential of the integration circuit AV
becomes zero, but the DC potential is either positive or negative. If it has a certain value, the
output of the integrating circuit 1 will be positive as well as positive. On the other hand, the
forward chamber voltage of the first and second diodes (1) and 3? is also defined as ?7 V if the
rising voltage between the base and the work of the NPN transistor (? ?) and PNP is also fixed
as ?7 V. Integral When the same output voltage becomes 2.1 V or more, the first diode (a)
conducts and the second diode ep does not conduct, and the base of the PNP transistor (second
to fourth) It falls to the C earth potential through four. Therefore, the N-PNi rush resistor (d)
conducts and the PNP transistor 5J1 also conducts, and from the stop power supply (7), relay
I21. Current limiting resistor 117), collector и 3 и y evening bus of NPNi Rashijisuta (?), and 1 ?
? T и Kota of PNP Torisgista ttl via negative mother #i to negative charge a (8) ti '71 t However,
when the lead is operated, the normally closed contact (d) is opened and a?a? is opened from
the output midpoint A of the amplifier circuit (1) and the M load t by direct current It can protect
from destruction.
Similarly, when the DC voltage at the output midpoint A of the amplifier circuit 11 becomes a
negative value and the output voltage of the integral IEJ ?? becomes ?2, 1 v or less, the first
diode member is not The base of #I I and the base of NPNi (to) falls to the ground potential, and
the second diode 2?, PNP transistor qQ and NPN transistor ?? become conductive, and
current flows to sushi -1 fi, a normally closed contact Open (d). The autopsy routine
decompensation point (2) continues to open as long as the direct current voltage at the output
midpoint A of the amplifier circuit (1) is negative, and no special holding circuit is required. In
the explanation of the figure, EndPage: 2 shows that the load protection circuit [1] is created
when the voltage fluctuation is 2.1 V or more or -2, 1 V or less, but it is optional by using a zener
dyne etc. The protection voltage can be selected. If you connect a rush instead of the current
limiting resistor 0 eta in history, it may also be an indication when the protection circuit is turned
on. As described above, the load protection circuit according to the present invention is a circuit
diagram showing that reliable load protection can be achieved with a simple circuit
configuration. Explanation of main figure numbers (1) ..... Amplifier circuit, (7X8) ..... Power
supply, ? ? ..... Load, 1 wet ..... Relay, ? furnace ..... load protection circuit, (optimal) иииии NPN
Torashiji ? evening, aQ ииииии PNP? ?????????? ........... Diode, (...) ... ... Integration circuit.
???????? ?
Без категории
Размер файла
12 Кб
description, jps5093760
Пожаловаться на содержимое документа