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JPH1066199

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Notice
This translation is machine-generated. It cannot be guaranteed that it is intelligible, accurate,
complete, reliable or fit for specific purposes. Critical decisions, such as commercially relevant or
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DESCRIPTION JPH1066199
[0001]
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a
circuit for generating a surround signal for obtaining a so-called surround effect, and more
particularly to a surround circuit for stabilizing output characteristics.
[0002]
2. Description of the Related Art A method using a so-called surround effect has hitherto been
known and known as a method of giving a sense of presence to sound from a speaker, and
various surround circuits for this have been proposed and put to practical use. FIG. 3 shows an
example of such a well-known and well-known surround circuit, and the surround circuit will be
generally described below with reference to the same figure.
[0003]
This surround circuit adds a right signal (hereinafter referred to as "R signal") and a left signal
(hereinafter referred to as "L signal") to obtain a sum signal by adding a first adder 30, and an R
signal and an L signal. A second adder 31 for generating a difference, a first reverberation signal
generation circuit 32 for generating a so-called center signal (hereinafter referred to as “C
signal”) based on the output signal of the first adder 30, and And a second reverberation signal
generation circuit 33 that generates a so-called surround signal (hereinafter referred to as "S
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signal") based on the output signal of the second adder 31. Here, the first and second
reverberation signal generation circuits 32 and 33 basically have the same configuration, and
more specifically, for example, as shown in FIG. A plurality of multipliers 35, a plurality of adders
36, and a filter 37 are provided.
[0004]
The delay unit 34 delays the input signal (the (L + R) signal which is the output signal of the first
adder 30 or the (L−R) signal which is the output signal of the second adder 31). It is designed to
output, and to obtain a plurality of delayed outputs. The plurality of delay outputs from the delay
unit 34 are respectively input to multipliers 35 provided corresponding to the number of
outputs, and are multiplied by predetermined coefficients and output.
[0005]
Furthermore, the output signal of each multiplier 35 is added to the input stage of a plurality of
adders 36 provided one less than the number of multipliers 35 so that the output signals of the
multipliers 35 are added sequentially in order from the side with the smaller delay time. The
output stage is connected, and the output signal of the final stage adder 36 is output to the
outside through a filter 37 provided to obtain a signal of a desired frequency band.
[0006]
However, in the above-described conventional surround circuit, the ratio between the in-phase
signal component of the input signal and the reverse-phase signal component in the first and
second reverberation signal generation circuits 32, 33. Because the levels of the output signals of
the first and second reverberation signal generation circuits 32 and 33 change even if the levels
of the input signals R and L are constant due to the difference between Even though the signal
level is constant, the balance of the C and S signals relative to the R and L signals will change.
In other words, there is a problem that the output signal level of the entire surround circuit
changes. Furthermore, in the above-described surround circuit, when the filter 37 is to pass only
reverberation signals of a specific frequency band, the output level is also the same as described
above due to the difference in the total spectrum amount of the pass signals. There is a problem
that it will change and, in conjunction with the above-mentioned causes, it will lead to a further
change of the output signal level of the whole surround circuit. Furthermore, in the above-
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described surround circuit, even if the input signal is interrupted, only the reverberation signal is
delayed from the point when the input signal is interrupted due to the so-called delay
characteristics possessed by the first and second reverberation signal generation circuits 32 and
33. And there is a problem that it is output.
[0007]
The present invention has been made in view of the above-mentioned situation, and provides a
surround circuit capable of obtaining a surround effect having no sense of incongruity because
the level of the output signal can be made substantially constant when the level of the input
signal is constant. It is Another object of the present invention is to provide a surround circuit
capable of suppressing the generation of so-called reverberation signals of a surround signal and
a center signal when an input signal is interrupted. Furthermore, another object of the present
invention is to provide a surround circuit capable of facilitating the design of a filter used in a
reverberation signal generation circuit without considering the fluctuation of the output level due
to the difference of the spectrum amount. It is in.
[0008]
A surround circuit according to the invention of claim 1 receives a right signal and a left signal
constituting a stereo signal, and generates a plurality of signals having different phases based on
the right and left signals. A surround circuit including reverberation signal generation means for
generating a reverberation signal by combining, and provided at the final stage of the
reverberation signal generation means, the gain variable being set according to the control signal
Amplifying means; integrating operation means for integrating the difference between the sum
signal of the right signal and the left signal and the output signal of the variable gain amplifying
means, and outputting the integration result as a control signal of the variable gain amplifying
means; It is something to be equipped.
[0009]
In such a configuration, a signal corresponding to the time integration of the difference between
the sum of the right and left signals and the output signal of the variable gain amplifying means
is obtained from the integration operation means, and a control signal for controlling the gain of
the variable gain amplifying means Therefore, the gain of the variable gain amplifying means
corresponds to the change of the levels of the right and left signals, and therefore, when the
levels of the right and left signals are constant, the level of the output signal is Can also be made
substantially constant, and when the right and left signals are interrupted, the degree of the
interruption is reflected in the integration result, and the gain suppression of the variable-gain
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amplifying means is performed, unlike the prior art. Even though the right and left signals are
interrupted, it is suppressed that only the reverberation signal is output as before.
[0010]
In particular, as in the invention according to claim 2, the reverberation signal generation means
comprises a center signal reverberation signal generation means and a surround signal
reverberation signal generation means, and the center signal reverberation signal generation
means A sum signal adder for calculating the sum of the right signal and the left signal, and a
center signal side for delaying the output signal of the sum signal adder and outputting a
plurality of delay signals having different delay times A delay unit for reverberation signal, a
multiplication unit for center signal side reverberation signal for multiplying each of a plurality
of outputs of the delay circuit by a predetermined constant, and outputting each output signal of
the multiplication unit in ascending order of delay time A center signal side reverberation signal
addition means for cumulative addition is provided, and the variable gain amplification means
comprises a sensor signal side reverberation signal gain variable amplification means and a
surround signal side reverberation signal gain variable amplification means The The output stage
of the center signal side reverberation signal adding means is connected to the input stage of the
center signal side reverberation signal gain variable amplifying means, and the surround signal
reverberation signal generation means comprises a right signal and a left signal. A difference
signal adder for calculating the difference between the two and a surround signal reverberation
signal delay device for delaying the output signal of the difference signal adder and outputting a
plurality of delay signals having different delay times; A plurality of outputs of the surround
signal delay circuit are multiplied by a predetermined constant, respectively, and the output
means of the surround signal side reverberation signal multiplying means and the surround
signal multiplying means are accumulated in ascending order of delay time A surround signal
side reverberation signal addition unit to be added; and an output stage of the surround signal
side reverberation signal addition unit has a gain variable for the surround signal side
reverberation signal That is configured to be connected to the input stage of the width means is
preferred.
[0011]
In such a configuration, the reverberation signal generation means for the center signal and the
reverberation signal generation means for the surround signal are realized basically in the same
configuration, except that the form of the input signal to the delay unit is different. It has become
possible to simplify the overall configuration.
[0012]
More specifically, the first integral signal calculating means calculates the difference between the
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sum signal of the right signal and the left signal and the output signal of the center signal
reverberation signal generating means; Center signal integrating means for time integrating the
output signal of the integrated signal calculating means, and a second integrated signal for
calculating the difference between the sum signal of the right signal and the left signal and the
output signal of the surround signal reverberation signal generating means And a surround
signal integrating means for performing time integration on the output signal of the second
integrable signal calculating means, and the center signal integrating means further includes an
input signal. A center signal side integration delay element for delaying the signal by a
predetermined time, and a center signal side integration adder for adding two signals, and one
input stage of the center signal side integration adder is provided. Is the first integrand signal
calculator The output signal of the center signal side integrating adder is input to the other input
stage of the center signal side integrating adder, and the output signal of the center signal side
integrating adder is input. An output signal of the center signal side integration adder is output
as a control signal of the center signal side reverberation signal gain variable amplification
means, and is feedback input to the center signal side integration delay element. The integration
means comprises a surround signal side integration delay element for delaying an input signal
for a predetermined time, and a surround signal side integration adder for adding two signals,
and the surround signal side integration adder The output signal of the second integrand signal
calculation means is input to one input stage of the second integrated circuit, and the surround
signal side The output signal of the delay element for delay is input, and the output signal of the
adder for surround signal side integration is output as a control signal of the gain variable
amplification means for surround signal side reverberation signal, and the addition for surround
signal side integration Preferably, the output signal of the unit is configured to be feedback input
to the surround signal side integration delay element.
[0013]
In such a configuration, in particular, when the right and left signals are input as digital signals
and digitally processed, except for the gain variable amplification means for the center signal
side reverberation signal and the gain variable amplification means for the surround signal side
reverberation signal, The various adders, multipliers, etc. can be easily realized, for example, by
using a so-called DSP (Digital Signal Processor) and loading and configuring a program that
fulfills the functions of the respective components described above. Therefore, when the level of
the input signal is constant, the level of the output signal can also be substantially constant, and
when the input signal is interrupted, generation of so-called reverberation signals of the
surround signal and the center signal is suppressed. Can easily be provided.
[0014]
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DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A surround circuit according to an
embodiment of the present invention will be described below with reference to FIGS. 1 and 2.
FIG.
The members, arrangements, and the like described below do not limit the present invention, and
various modifications can be made within the scope of the present invention.
The surround circuit in the embodiment of the present invention is roughly divided into a
common operation unit 1, a center signal generation unit 2, and a surround signal generation
unit 3.
The common operation unit 1 is for generating an absolute value of the sum of right and left
signals required by the center signal generation unit 2 and the surround signal generation unit 3
as described later, and is an absolute value for the first common operation. A value circuit
(denoted as “ABS” in FIG. 1) 4, a second common operation absolute value circuit (denoted as
“ABS” in FIG. 1) 5, and a common operation adder 6. It will be
[0015]
The right signal is input to the first common operation absolute value circuit 4 so that an
absolute value output can be obtained, and the absolute value output is input to one input
terminal of the common operation adder 6. It is supposed to be
Further, the left signal is input to the second common operation absolute value circuit 5 so that
an absolute value output can be obtained, and the absolute value output is the other input
terminal of the common operation adder 6. It is supposed to be input to
The right signal and the left signal constitute so-called stereo signals.
Then, the common operation adder 6 outputs a signal of the sum of the absolute values of the
right signal and the left signal, which are respectively input to the center signal generating unit 2
and the surround signal generating unit 3 described later. ing.
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[0016]
In the center signal generating unit 2 and the surround signal generating unit 3, the sum signal
adder 7a of the center signal generating unit 2 outputs a right signal (denoted as "R" in FIG. 1)
and a left signal (denoted in FIG. 1). While the difference signal adder 7b of the surround signal
generation unit 3 is to obtain the difference between the right signal and the left signal. The
other components are basically the same except for the difference.
[0017]
Therefore, in the following description of the configuration of the center signal generation unit 2,
after the component number of the center signal generation unit 2, the number of the
corresponding component of the surround signal generation unit 3 or the corresponding
component The name and the number will be described, and the explanation will be replaced
with the explanation of the configuration of the surround signal generator 3.
The center signal generation unit 2 includes a sum signal adder 7a, a center signal reverberation
signal generation circuit 8a (surround signal reverberation signal generation circuit 8b), and a
center signal integration circuit 9a (surround signal integration circuit 9b). Center signal absolute
value circuit 10a (surround signal absolute value circuit 10b), center signal multiplier 11a
(surround signal multiplier 11b), center signal adder 12a (surround signal adder 12b) It is what
comprises. In FIG. 1, both the center signal reverberation signal generation circuit 8a and the
surround signal reverberation signal generation circuit 8b are described as "the reverberation
signal generation circuit", and the center signal absolute value circuit 10a and the surround
signal absolute Both the value circuits 10b are described as "ABS".
[0018]
As described above, the sum signal adder 7a receives the right and left signals and generates a
signal of the sum thereof, and is realized by a known and known so-called adder. An output
signal of the sum signal adder 7a is input to a first input terminal 13a of the center signal
reverberation signal generation circuit 8a. In the surround signal generation unit 3, the right and
left signals are input, and the output signal of the difference signal adder 7b that generates the
difference signal is the first input terminal 13a of the surround signal reverberation signal
generation circuit 8b. It is supposed to be input to
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[0019]
The center signal reverberation signal generation circuit 8a generates a plurality of signals
having a phase difference with respect to the output signal based on the output signal of the sum
signal adder 7a, and generates a center signal by adding these signals. It is the In the case of the
surround signal reverberation signal generation circuit 8b, a plurality of signals having a phase
difference with respect to the output signal are generated based on the output signal of the
difference signal adder 7b, and the surround signal is added. Is intended to generate
[0020]
As a specific configuration example of the center signal reverberation signal generation circuit 8a
(surround signal reverberation signal generation circuit 8b) having such a function, for example,
the one shown in FIG. 2 is preferable. The configuration of the center signal reverberation signal
generation circuit 8a and the configuration of the surround signal reverberation signal
generation circuit 8b are basically the same, so in the following description of the configuration
example, the center signal reverberation signal generation circuit 8a The constituent elements
and numbers constituting the surround signal reverberation signal generation circuit 8b are
described in parentheses after the constituent elements making up the above, and the
explanation will be replaced with the explanation of the configuration of the surround signal
reverberation signal generation circuit 8b. That is, the center signal reverberation signal
generation circuit 8a (surround signal reverberation signal generation circuit 8b) includes the
center side reverberation signal delay unit 14a (surround side reverberation signal delay unit
14b) and a plurality of center side reverberation signal multiplications. Device 15a (surrounder
reverberation signal multiplier 15b), a plurality of center reverberation signal adders 16a
(surround reverberation signal adder 16b), and a center reverberation signal filter 17a (surround
reverberation signal filter) 17b) and a center side reverberation signal gain variable amplifier
18a (surround side reverberation signal gain variable amplifier 18b). The center-side
reverberation signal delay unit 14a (surround-side reverberation signal delay unit 14b) is
configured to output a signal delayed with respect to the signal input from the first input
terminal 13a. It has a plurality of output terminals, and a delayed signal can be obtained from
each of the output terminals with a desired delay time. Generally, delayed signals can be obtained
from respective output terminals at predetermined delay time intervals, and when the input
signal is an analog signal, for example, one formed by using a so-called delay line, or CCD It can
be comprised by various well-known and well-known elements, such as what consists of
elements. When the input signal is a digital signal, it is preferable to use a so-called IC memory.
That is, in the case of using this IC memory, the digital signal is stored in each storage area every
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time a digital signal is input, and the storage area in which the digital signal is stored is used. By
specifying a so-called address, it is possible to read out a signal of a desired delay time. For
example, in FIG. 2, as the output end of the center-side reverberation signal delay unit 14a
(surround-side reverberation signal delay unit 14b) located on the right side of the paper surface,
a signal with a longer delay time can be obtained.
[0021]
A plurality of center side reverberation signal multipliers 15a (surround side reverberation signal
multipliers 15b) are provided corresponding to the number of output terminals of the center side
reverberation signal delayer 14a (surround side reverberation signal delayer 14b). For example,
each center-side reverberation signal multiplier 15a (surround-side reverberation signal
multiplier 15b) is configured to multiply the input signal by the same constant (or different
constants). The output signal is input to a plurality of center side reverberation signal adders 16a
(surround side reverberation signal adders 16b). That is, the plurality of center-side
reverberation signal adders 16a (surround-side reverberation signal adder 16b) are delayed
signals through the plurality of center-side reverberation signal multipliers 15a (surround-side
reverberation signal multipliers 15b). The delay time is connected in order from the smallest to
the smallest, and the final addition result is input to the center side reverberation signal filter 17a
(surround side reverberation signal filter 17b). . Therefore, with such a configuration, the
plurality of center-side reverberation signal adders 16a (surround-side reverberation signal adder
16b) are the plurality of center-side reverberation signal multipliers 15a (surround-side
reverberation signal multipliers). It is provided one less than the number of 15b). The plurality of
center-side reverberation signal multipliers 15a realize the center signal-side reverberation signal
multiplication means, and the surround side reverberation signal multipliers 15b realize the
surround signal-side reverberation signal multiplication means. ing. Further, the plurality of
center side reverberation signal adders 16a realize the center signal side reverberation signal
addition means, and the surround side reverberation signal adder 16b realizes the surround
signal side reverberation signal addition means. ing.
[0022]
The center side reverberation signal filter 17a (surround side reverberation signal filter 17b)
includes the center side reverberation signal delay unit 14a (surround side reverberation signal
delay unit 14b) described above, and a plurality of center side reverberation signal multipliers
15a ( For removal of originally unnecessary signal components to be multiplied in the process of
surround side reverberation signal multiplier 15b) and center side reverberation signal adders
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16a (surround side reverberation signal adder 16b), or It is provided in order to pass only the
signal of the frequency band of (1), and has a known and known configuration. The center-side
reverberation signal gain variable amplifier 18a (surround side reverberation signal gain variable
amplifier 18b) has a known and well-known configuration in which the gain can be varied by an
external control signal, which will be described later. An output signal of the center signal
integration circuit 9a (or the surround signal integration circuit 9b) is input as a control signal
through the second input terminal 13b. The output signal of the center side reverberation signal
filter 17a (surround side reverberation signal filter 17b) is sent to the second input terminal 13b
of the center side reverberation signal gain variable amplifier 18a (surround side reverberation
signal gain variable amplifier 18b). The signal is amplified and output by the center side
reverberation signal gain variable amplifier 18a (surround side reverberation signal gain variable
amplifier 18b) at a gain determined according to the control signal input via the signal line.
[0023]
The output signal of the center signal reverberation signal generation circuit 8a (surround signal
reverberation signal generation circuit 8b) is output to the outside as a center signal (surround
signal in the surround signal reverberation signal generation circuit 8b) and for the center signal.
The absolute value circuit 10a (surround signal absolute value circuit 10b) is input and
converted into an absolute value, and the center signal adder 12a (surround signal adder 12b) is
input. A signal from the center signal multiplier 11a (surround signal multiplier 11b) is also
applied to the center signal adder 12a (surround signal adder 12b), and this center signal
multiplier A signal obtained by multiplying the signal from the previous common operation adder
6 by a predetermined constant is output from 11a (surround signal multiplier 11b).
[0024]
Then, from the center signal adder 12a (surround signal adder 12b), the output signal of the
center signal multiplier 11a (surround signal multiplier 11b) is output from the center signal
absolute value circuit 10a (surround signal absolute) A signal equal to the subtraction of the
output signal of the value circuit 10b) is obtained. That is, in other words, the output signal of the
common arithmetic operation adder 6 is | L | + | R |, the constant in the multiplication by the
center signal multiplier 11a is, for example, k1, and the center signal absolute value circuit 10a
Assuming that the output signal is represented as | C |, respectively, an output signal represented
by k1 × (| L | + | R |) − | C | can be obtained from the center signal adder 12a. Become.
Similarly, an output signal represented by k2 × (│L│ + │R│) -│S│ is obtained from the
surround signal adder 12b. Here, k2 is a constant in the surround signal multiplier 11b, and | S |
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is an output signal of the surround signal absolute value circuit 10b. The output signal of such a
center signal adder 12a (surround signal adder 12b) is input to the center signal integration
circuit 9a (surround signal integration circuit 9b) and integrated, and the center signal
reverberation is performed. The control signal is applied to the second input terminal 13b as a
control signal of the signal generation circuit 8a (surround signal reverberation signal generation
circuit 8b). The portion constituted by the common arithmetic unit 1 described above, the center
signal absolute value circuit 10a, the center signal multiplier 11a, and the center signal adder
12a corresponds to the first integrated signal calculation means. The portion composed of the
common arithmetic unit 1, the surround signal absolute value circuit 10b, the surround signal
multiplier 11b, and the surround signal adder 12b is the second one. The integrand signal
calculation means is realized.
[0025]
The center signal integration circuit 9a and the surround signal integration circuit 9b basically
have the same configuration, and the configuration will be described below based on the
configuration example shown in FIG. In the description of the configuration example, the
components and numbers constituting the surround signal integrating circuit 9b are written in
parentheses after the components constituting the center signal integrating circuit 9a, and the
configuration of the surround signal integrating circuit 9b Will be replaced by the explanation of
The center signal integration circuit 9a (surround signal integration circuit 9b) includes, for
example, a center signal integration multiplier 19a (surround signal integration multiplier 19b)
and a center signal integration adder 20a (surround signal). A side integration adder 20b) and a
center signal side integration delay element 21a (surround signal side integration delay element
21b), and the center signal side integration adder 20a (for surround signal side integration) The
adder 20b) includes the output signal of the center signal integrating multiplier 19a (surround
signal integrating multiplier 19b) and the output of the center signal integrating delay element
21a (surround signal integrating delay element 21b). Signals are input and added together. Then,
the output signal of the center signal side integrating adder 20a (surround signal side integrating
adder 20b) is fed back to the input stage of the center signal side integrating delay element 21a
(surround signal side integrating delay element 21b). On the other hand, the signal is applied to
the second input terminal 13b of the center signal reverberation signal generation circuit 8a
(surround signal reverberation signal generation circuit 8b). The center signal side integration
delay element 21a (surround signal side integration delay element 21b) is a digital signal when
the signal input to the center signal integration circuit 9a (surround signal integration circuit 9b)
is a digital signal. An input signal of the center signal side integration delay element 21a
(surround signal side integration delay element 21b) is provided with a delay of so-called one
sampling time.
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[0026]
Next, the operation of this surround circuit in the above configuration will be described. First, in
the center signal reverberation signal generation circuit 8a, the sum signal having a plurality of
phase delays generated by the center signal reverberation signal delay unit 14a is synthesized
based on the sum signal of the right and left signals. The center signal is generated by the abovementioned method, and this point is in no way different from the conventional generation
principle of the center signal. However, in the embodiment of the present invention, since the
center signal side reverberation signal gain variable amplifier 18a is provided at the final stage of
the center signal reverberation signal generation circuit 8a, the level of the output center signal
is It changes as follows, and this point is particularly different from the conventional one. That is,
the signal for controlling the gain of the center signal side reverberation signal gain variable
amplifier 18a of the center signal reverberation signal generation circuit 8a is the output signal
of the center signal adder 12a (k1 × (| L | + | R). Since the time integration of |) − | C |) is
performed, the gain of the center signal side reverberation signal gain variable amplifier 18a of
the center signal reverberation signal generation circuit 8a is relative to the level of the sum
signal of the right and left signals. Thus, the center signal is output at a level corresponding to
the levels of the right and left signals. Also, when the right and left signals are interrupted, the
integral output is a negative signal as understood from the above equation, so the center signal
reverberation signal gain variable amplifier 18a of the center signal reverberation signal
generation circuit 8a. Thus, the center signal is hardly output.
[0027]
The surround signal is basically the same as that of the center signal described above. That is,
first, in the surround signal reverberation signal generation circuit 8b, the difference signal
having a plurality of phase delays generated by the surround signal reverberation signal delay
unit 14b based on the difference signal between the right signal and the left signal is The
surround signal is generated by being synthesized, and this point is in no way different from the
conventional generation principle of the surround signal. However, in the embodiment of the
present invention, since the surround signal side reverberation signal gain variable amplifier 18
b is provided at the final stage of the surround signal reverberation generation circuit, the level
of the output surround signal is As such, this point is different from the conventional one. That is,
the signal for controlling the gain of the center signal side reverberation signal gain variable
amplifier 18b of the surround signal reverberation signal generation circuit 8b is an output
signal of the surround signal adder 12b (k2 × (| L | + | R). Since the time integration of |)-| S |) is
performed, the gain of the variable-gain amplifier 18b for center signal side reverberation signal
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of the surround signal reverberation signal generation circuit 8b is relative to the level of the
sum signal of the right and left signals. Thus, the surround signal is output at a level
corresponding to the levels of the right and left signals. Further, when the right and left signals
are interrupted, the integral output is a negative signal as understood from the above equation,
so that the gain variable amplifier 18b for the center signal side reverberation signal of the
surround signal reverberation signal generation circuit 8b. Therefore, the surround signal is
hardly output.
[0028]
Although in the embodiment of the invention described above, each component is described as if
it were configured by separate hardware, it is not necessary to be configured separately by
hardware, and it is practical Is more preferable because it uses a so-called DSP (Digital Signal
Processor) and is loaded with a program that fulfills the functions of the above-described
components, because it has high versatility and simple configuration. .
[0029]
As described above, according to the present invention, it is possible to obtain so-called
reverberation signals according to changes in the levels of the right and left signals as input
signals, and when the input signals are interrupted. In the present invention, the output level of
the reverberation signal is suppressed so that the level of the reverberation signal does not
fluctuate even though the level of the input signal does not change, unlike the prior art. When
the input signal is interrupted, unlike the conventional case, only the reverberation signal is not
output at the same level as before, so that a good surround effect without a sense of discomfort
can be obtained.
Even when a filter is provided in the reverberation signal generation means to limit the frequency
band of the reverberation signal, the output level changes the level of the right and left signals as
input signals at the final stage of the reverberation signal generation means. Therefore, unlike in
the prior art, when designing a filter, it is not necessary to take into account fluctuations in the
output level due to differences in the amount of spectrum, so that the filter design conditions
should be relaxed. As a result, it is possible to make the design work easier and to contribute to
the simplification of the configuration of the entire circuit and the cost reduction.
[0030]
Brief description of the drawings
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[0031]
1 is a configuration diagram showing a configuration example of a surround circuit in the
embodiment of the present invention.
[0032]
2 is a configuration diagram showing a configuration example of a center signal reverberation
signal generation circuit and a surround signal reverberation signal generation circuit used in the
surround circuit shown in FIG.
[0033]
3 is a configuration diagram showing a configuration example of a conventional surround circuit.
[0034]
4 is a configuration diagram showing a configuration example of the first and second
reverberation signal generation circuit used in the surround circuit shown in FIG.
[0035]
Explanation of sign
[0036]
DESCRIPTION OF SYMBOLS 1 common operation unit 2 center signal generation unit 3 surround
signal generation unit 8 a reverberation signal generation circuit 8 b for center signal
reverberation signal generation circuit 9 a for surround signal integration circuit 9 b for center
signal integration circuit 14 a for surround signal ... Center signal side reverberation signal delay
unit 14b ... Surround signal side reverberation signal delay unit 18a ... Center signal side
reverberation signal gain variable amplifier 18b ... Surround signal side reverberation signal gain
variable amplifier 19a ... Center signal side integration multiplier 19b: Surround signal side
integration multiplier 20a: Center signal side integration adder 20b: Surround signal side
integration adder 21a: Center signal side integration delay element 21b: surround signal side
integration delay element
08-05-2019
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