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(4) Decoder for 4-channel stereo system O Special Application No. 47-6291, [Phase] Application
No. 47 (1972) January 17 (during pre-examination) Publication No. 47-31601. , @ 47 47 (197, z,
...) '1 13th priority claim [Fa] February 24, 1971 [Fa] Americas country ? 1182710 inventor
Benjamin Bishita ? Bauer, American congregation, Kai , Connecticut U, (5, Tanford Red Fock S.
Lord 92 ░ [1111113 '[phase] Attorney Patent Attorney Sugimura Tatsuhide 1 person) Detailed
Description of the Invention The present invention has only two independent tracks A device for
storing and reproducing information of four individual channels in a medium consisting of the
above, reproducing such information and supplying it to four speakers so that the listener can
hear the sound from four individual sound sources The present invention relates to a 4-channel
stereo decoder, and in particular, to a 2-track medium in a method as described in Japanese
Patent Application No. 46-39414 previously proposed by the present applicant. It relates to an
improvement of the decoder for 4-channel speech known as: rquadruphonic5oundJ. The
recording method disclosed in the above-cited Japanese Patent Application No. 46-39414 is
based on the encoding technology, in which four signals related to the 4-channel voice (these are
referred to as ?left front? and ?left front? for convenience. The left rear, Lf, Lb, Rf and Rb
respectively for "right front" and "right rear" are passed through six all pass phase transition
networks, after which these signals are in appropriate proportions To form two combined signals
L1 and RT. These composite signals may be transmitted via two conductors, or recorded and
reproduced via a two-channel recording medium such as a stereo disc code, and then a suitable
decoder device as disclosed, for example, in the applicant's above mentioned proposal. Convert
and decode into four simulated voice channels. Here, it is assumed that details of the encoder are
not described (... But the vector components corresponding to the synthesized signals LT and RT
are in the relationship shown by the vector diagrams 10 and 2 in FIG. Here, the signals LT and
RT respectively comprise the main signals Lf and R4, and the signals LT and 11111111EndPage:
2 and RT respectively produce smaller components of signals Lb and Rb different in phase 90
'from each other, the signal LT1 In / c, it is assumed that L is more advanced than L, and in the
signal RT, Rb is quasi-phased than R4.
It should be noted that the signals Lf, Lb, Rf and ?Rb are generally found to be incoherent,
because these signals originate from different instruments and voice groups, and thus the vector
diagram 10 and the vector diagram 10 and 12 (and further including other vector diagrams to be
described later) shows the phase relationship of the common-phase ceramic wave number
component of the original signal. Furthermore, one in general, channels Lf and Rf are the ones
associated with the left and right speakers respectively located at the front two corners of the
listening room, the signals Lb and R are the rear corners of the left and right sides of the listening
room Is associated with each speaker located in. In the above-mentioned Japanese Patent
Application No. 46-39414, usually, it is reproduced after being reproduced from a tape or a disk
record by a conventional reproducing apparatus, and further supplied to a decoder directly or
after being released by a two-channel broadcast system. In order to decode the illustrated signals
LT and RT, each of these signals is first passed through an all pass phase shift network (herein
referred to as 1 network) to substantially change the signal amplitude (a phase angle of As a
function, the transition is made equal to the amount indicated by the equations (F + 90 ░) and (F
+ O ?). Here, the equation in () shows the frequency function with respect to the phase angle of
each network. The reference angle-can be chosen arbitrarily, but it needs to be approximately the
same amount for all phase shifting networks in the decoder. Here, although the phase shift angle
is on the delay side, if all are consistent in the decoder, it may be set as the lead phase shift angle,
whereby the vector components appearing at the output terminals A and Bk of one network are
vector diagrams 14 And appear in the position shown at 16. As can be seen, the magnitudes of
the various frequency components and the relative positions of the individual components are
maintained. However, in practice, the phase shifts more than in the vector diagrams 10 and 12
by the reference angle V which is a function of these frequencies. In order to show such relative
phase shift, the signs of the vector components of the vector diagrams 14 and 16 will be given '7'
to distinguish them from each other. Further, in the following, each time the phase transition is
made to occur through the signal mlV network, the code will be additionally added. Thus, the
vector diagram 14 has L 'as the main signal, and along with it has the same relative relationship
Ktr) as in the vector diagram 10 with respect to L':% 0.707 L 'and 0.707 Rb'. The vector diagram
16 has Rf 'as the main signal and with it also the signals 0.707 R' and 0.707 Lb 'in relative
relation as in the vector diagram 12.
By differentially shifting the phase by 90 ░, the vector components of vector diagrams 14 and
16 can be positioned in phase with each other so that addition and subtraction can be performed
linearly, whereby terminals Ck and D ( Derive two more signals, r8 respectively in vector
diagrams 18 and 20. Signal 18 contains Lb 'signal as the main signal, signal 20 contains Rb'
signal as the main signal, and furthermore both signals have relative phase relationship as shown
in the respective vector diagram, 0.707 L 'and It has 0.707 Rf /. Thus, the original signals L, R, L
and L are respectively obtained by the relatively simple decoding process disclosed in the above-
mentioned Japanese Patent Application No. 46-39414 (this process is also used in one example
of the decoder of the present invention). Four signals 14, 16, 18 and 20 are formed which
contain R as the main signal. These deconidated signals are not "pure" and not independent
(discrete) source signals ("diluted" by each other two signals, ie, one other two signals are mixed).
However, all four channels of the original program contain the music signal of the concert, and
when the four decoded signals are played from the speakers placed at the four corners of the
listening room, the listener can hear it in that room. The sounds are fully "mixed" and the
resulting global sound effects are very similar to the sounds of the original four discrete
channels, thus ensuring that the original four channel program can be reproduced. However,
there is also a desire to obtain the hearing that the decoded signal is more independent and pure.
For example, when the original sound is present in only one or two channels, the gain of the
originally inactive channel is automatically attenuated to improve the separation of the channel
in which the audio signal is present W111111 EndPage: 3 It is a desirable case. The abovementioned Japanese Patent Application No. 46-39414 and Japanese Patent Application No. 4680651 according to the applicant's previous proposal disclose two kinds of logic and control
devices for enhancing such spatial effects. It is done. The object of the present invention is to
provide a decoder for 4-channel stereo appropriately configured so as to be able to enhance the
sense of presence of 4-channel stereo more than in the case of these previous proposals and to
simplify the circuit therefor. It is. (1) In the present invention, two pairs of phase shifting
networks are provided at the input terminal of the decoder (instead of the two phase shifting
networks used in the above-mentioned decoder) to properly operate the six pairs of networks. To
provide a phase shift of 900 between the signals applied to these networks, and by providing two
combined internal force signals in parallel to each network pair, the four output signals are
decommissioned, Make these output signals suitable by giving them an appropriate phase
relationship with each other.
Add and subtract to include as a "right front", "left rear", "right front" and "right rear"
informational hazard signal and suitable for feeding to each corresponding speaker without any
further phase shift It is possible to generate four signals having a relative phase relationship with
one another, which allows the decoder to be configured simply and at a low cost. Thus, according
to the present invention, decoding can be performed effectively using only four phase shift
networks. On the other hand, if two phase shifting networks are used at the input terminals, then
four more, and therefore a total, to make the phase relationship between the signals supplied to
the four speakers equally suitable. There is a dispute in using six phase transition networks. .
Another object of the present invention is to improve the logic circuit so as to properly control
the gains of the amplifiers associated with the four individual speakers to enhance the sense of
presence in four channel reproduction. So, in the present invention, is it similar to the signal
generated by the decoder and finally supplied to the speakers? The four signals are individually
rectified, and the resulting voltage waveforms are compared and shaped to generate a pair of
gain control signals, which are used to control the gain of the gain control signal in each speaker
circuit. [111111] control the amplifier gains associated with the two ?forward? speakers
together by one of the gain control signals, and control the two (?other? two speakers
together) The relative phase of the channel's signals and the nature of the control signals derived
from waveform matching improve the separation between the "forward" and "rear" sounds to
enhance the realism of four-channel playback. The invention will now be described with
reference to the drawings. The decoder of the present invention is similar to that of the Japanese
Patent Application No. 46-39414 and Japanese Patent Application No. 46-80651 according to
the applicant's previous proposal described above. The details of the decoder of the abovementioned Japanese Patent Application No. 46-39414 are also described in Japanese Patent
Application No. 46-30898 proposed by the present applicant. Here, we will only cite those
applications as necessary to explain the operation of the decoder of the present invention, to the
extent necessary for the person skilled in the art to understand the operation of the present
invention without reference to these applications. In FIG. 1, only in the decoder according to the
present invention, the synthesized signals LT and R are supplied to the corresponding input
terminals 22 and 24 in the same manner as in the above-mentioned respective applications, and
these synthesized signals are paired. V-networks 26 and 28 plus relative phasing 900.
Make it transition. In particular, it is possible to multiply the signals as shown in the vector
diagrams 14 and 1.6 to the terminal of the terminal and to the terminal B, respectively, and
further to configure these signals 14 and 16 by simple resistances and capacitors. General circuit
3 (! With 32 and 32 not added and subtracted, terminals C and D or 5 take out signals as shown
in vector diagrams 18 and 20. However, the decoder according to the invention comprises an
improved logic and control circuit, whereby in the civil engineering invention the 4-channel,
ambience can be increased, of the signals supplied to the four non-beakers. As will be described
later by the logic circuit 34 which shows the instantaneous amplitude in a dotted line frame as
described later, it is controlled purely properly to give the listener a sense of listening of four
individual sound sources to a part where four sound sources exist. In the evening, it is possible to
separate channels relatively well even when there are less than 4 original signals present in the
human power signals LT and RT. To that end, the signals at terminals A, B, C and D, respectively
indicated by vector diagrams 14.16.18 and 2.0, are supplied to respective rectifiers 36, 38 ░ 40
and 42 which are preferably full stirring rectifiers. Further, the rectified signal is supplied to an
integrator, which is connected in parallel to [111111] EndPage: 4 in parallel with capacitors 44,
46, 48 and 50 respectively and anti-52, 54, 56 and 58 for smoothing. Do. The falling time
characteristics of the four and the rectifier-integrator circuit are almost the same, and the rising
time is relatively quick such as o, ooi seconds, while the falling time is relatively long, such as 20
ms. Do. However, these times can be changed to various values. In the subtraction-path 60, the
voltage obtained from the rectifier 38 is subtracted from the signal obtained from the rectified
quantum 6. The subtraction circuit 60 can be easily configured by summing resistors or
connection points. Furthermore, in a similar subtraction circuit 62, the voltage obtained from the
transformer 42 is subtracted from the signal obtained from the rectifier 40. The signals obtained
from the subtraction circuits 60 and 62 are rectified again by the rectifiers 64 and 66 and then
integrated by the RC circuits 68 and 170, respectively. Here too, it is preferred that the rectifiers
64 and 6.6 be full wave rectifiers. It has been found that satisfactory results can be obtained by
setting the RC circuits 6.8 and 70 and the rise time to be approximately equal to about 10
milliseconds and the fall time to about 400 milliseconds. But 1 these values are not good for
every 45 u of operation 1.
Experiments have shown that it can be varied over some ranges. . Next, the voltage that appears
in the stylish runners 72 and 74. Each is a 1 to 9 parting shaping network 76 and 78 with
logarithmic relation. LQ shaped 1. Further, the output of one pair of subtraction side t6 is
supplied to the subtraction terminal of the calculation circuit 80 and the addition terminal of the
subtraction open time 82, the output of the network 78 is a subtraction circuit, the negative side
terminal portion of 82 Supply to the side terminal. In such connections, in some cases it is not
necessary to provide a wave shaping network 1 7.6 and ? 8. A circuit for subtracting the voltage
appearing at connection points 72 and 74. And 82 directly as shown. Alternatively, waveform
shaping networks 7.6 and 78 may be subtracted from circuits 460 and 62 and respective
corresponding rectifiers 64 and 6! It can also be placed between three. In short, waveform
shaping networks 76 and 78 control signals, no. To maintain the relative amplitudes as a
function of the position of the signals LLR and Rb and the relative magnitude of these signals
independently of the total amplitude. In any of the circuit arrangements, the control circuits Eb
and Ef having characteristics as described in the description by the subtractor circuits 80 and 82
are taken out, and a speaker circuit that processes the speaker signal ?forward? than the Effold signal. Control the gain 1, control the gain of the "back" speaker circuit by the voltage Eb. On
the other hand, the original 4. Channel stereo signal Lf. Terminal A corresponding to Lb, Rb and
R [respectively. 5 can also be operated satisfactorily with decoding and gain circuit 34 by
supplying the signals present in B, C and D to the individual loudspeaker 7 circuits, but each said
signal has an additional 4 V, It is preferred to feed through networks 84 ░ 86. 88 and 90. These
V networks 1 allow the phase to be further differentially shifted to make the relative phase
relationship between the corresponding signal components 92 ░ 94.96 and u 9 B more
appropriate to each other, and to be adjacent gold speakers. Make the hearing of voice
reproduction natural in a pair. However, even when the V network 8479G is not provided,
although it is not ideal, it can be operated in a pair of battles. By taking out the human power
signal to be supplied to the left front and right front spears from the terminals A 'and B' of the
input ends of the V networks 26 and 28 instead of making it be as follows. This can also help to
maintain the completeness of the phase relationship of the signal components in the front
speakers when W network 84-90 is not used.
Use the signals taken out of the V network 84.86.88 and 90 respectively? ???? I supply
power to the input terminals of 5100 ░ 102.104 and 106, and supply the outputs of these
amplifiers to 108 ░ 110.112 and 114 respectively. Place in each corresponding corner of the
paste room 116. These non-beakers reproduce the phase shift signals Lf "tLb" tRb "and Rf" of the
signals Lf ', Lb (2, Rb2 and Rf', respectively). Of course, other arrangements of the speakers can
be made according to the preference of the listener. Each of the gain control amplifiers 100, 102,
104 and 106 includes control electrodes 118, 120, 122 and 124, and the control voltage is
applied to these control electrodes to change the gain of the amplifier. The gain control amplifier
can be realized by a variable gain control vacuum tube, a suitable variable gain transistor, a
suitable variable gain circuit, or any other known technique capable of cascading a variable gain
in response to an applied voltage. . The control voltage E of the subtraction circuit 82 is supplied
in parallel to each control terminal 11 '8 and 124 of the amplifiers 100 and 106 to control the
gain of the "forward" speaker for reasons to be described below and further subtraction Control
signal Eb of circuit 80 is provided in parallel to control terminals 120 and 122 of amplifiers 102
and 104 to control the amplification of the signal applied to the "rear" speakers. An example of
the relationship representing the gain of amplifiers 100-106 as a function of the voltage applied
to each gain control terminal is shown in FIG. As can be seen from this example, the gain factor is
about 80% of the maximum value when the gain control voltage is zero. Here, if the control
voltage Eb or Ef to be printed is significantly positive, the amplification factor reaches a value of
100%, and when the control voltage is negative, the blinding amplification factor decreases and
the value -E The amplifier is cut off so that no signal emerges from the speaker corresponding to
that amplifier. With the circuit in place, all speaker circuits are approximately 80, with control
signals Eb and Ef being zero or nearly zero when there is no input signal or when all signals are
simultaneously present with equal strength. K to get a% gain. Such external characteristics can be
changed within an appropriate range, and the shape of the curve 128 can also be deformed. A
time constant circuit is incorporated in each of the gain control amplifiers 100 to 106, and the
characteristics are appropriately adjusted. The amplification factor can be increased rapidly by
applying a rapidly increasing control voltage as defined in the above, but by decreasing the
control voltage relatively slowly, such as by slowing the discharge of the capacitor. Make sure
that the amplification rate decreases too quickly and does not "release."
Satisfying results were confirmed by setting the stop time to about 0.02 seconds and the
"release" time to about 0.80 seconds. However, these values can be varied over a wide range of
squares without compromising the operation of the invention. The operating principle of the
decoder and logic circuit shown in the first figure is based on the phase relationship of the
signals shown in vector diagrams 14.16, 1B and 20. These vector diagrams are shown enlarged
in FIG. 1C for easy understanding of the operation of the logic circuit. For example, when only
the left front signal Lf 'is present at the terminal A, no signal appears at the terminal B as can be
seen from the vector 16 of the right front signal. However, in the two vector groups 18 and 20,
the signal L 'appears as the same bek) / L / component 0.707L'. On the other hand, when the
right front note Rf 'is present in the vector group 16, this signal does not appear in the vector
group 14, but in the vector groups 18 and 20, it appears in the reverse phase relation with equal
magnitude. When both signals L 'and R' are present at the same time, there is no correlation at
terminals A and B since they are different speech signals, but either positive or negative
correlation at terminals C and DIIC . On the other hand, for the same reason, two of these signals
do not show correlation at terminals C and D when present in only one or both of the signals Lb
'and Rb2, but either directly or reversely at terminals A and B Shows the correlation of The
present invention seeks to recognize the presence or absence of these correlations without the
use of nine conventional multiplications and ? stock passes using novel principles. In order to
recognize the presence or absence of the correlation, the waveform of the signal appearing at the
decoder may be instantaneously checked instead of being set to 5. Referring to FIG. 1C, it is
assumed that only the left front signal L is present, and this signal appears as a vector
component Lt / shown by a thick solid line after passing through one network 26Vc. Rectifying
this signal with the rectifier 36 generates a voltage to be applied to the positive terminal of the
subtraction circuit 60 from k. Since no signal is present at terminal B, no voltage appears from
the rectifier 3B, so that after subtraction in the circuit 60, a current attributable to the signal L
'only appears at its output terminal and the integrator circuit A voltage is generated at the
connection point 72 of 68. As for the vector groups 18 and 20, the two signals 0.707L 'indicated
by thick solid lines are equal in both phase and magnitude. Therefore, the voltages at the output
terminals of the full-wave rectifiers 40 and 42 are equal in magnitude and waveform due to the
contribution of these two signals, and as a result of the subtraction, the circuit 62 subtracts one
from the other. The current at 74 is zero and so the voltage is also zero.
When the signals appearing at terminals 72 and 74 are shaped by the respective shaping
networks 76 and 78 and subsequently subtracted by subtraction circuits 80 and 82, a negative
voltage Eb appears at the output of subtractor 80. Supplying this voltage in parallel to the gain
control terminals 120 and 122 of the amplifiers EndPage: 6102 and 104 partially or completely
shut off those amplifiers 102 and 104 which energize the "rear" speakers 110 and 112. At the
same time, the amplifiers 100 and 106 feeding the "forward" speakers 108 and 114 are at
maximum gain. Therefore, the signal Lf is mainly reproduced from the left front speaker 108. .
Similarly, when only a signal Rf 'indicated by a thick broken line is present in the vector group
16, only two vector components appear. That is, the vector component 0.707Rf 'appears at the
terminal C, and 0.707R4' appears in the opposite direction at the terminal. Thus, in this case the
output of the rectifier 36 is zero and the output of the rectifier 38 has a maximum value, ie
corresponds to the vector component Rf '. A current flows toward the subtractor by subtracting
these two signals in the subtractor 60. However, since the rectifier 64 is a full wave rectifier, the
voltage appearing at the connection point 72 is the same as before (a positive voltage. Again, in
vector groups 18 and 20, the vector components of terminals C and D, 0.707 Rf ', point in
opposite directions to one another, but since rectifiers 40 and 42 are full wave rectifiers, their
respective output terminals are The voltages generated are of the same polarity and have
approximately equal values. FIG. 3 shows this state, for example, an impulse contained in the
signal Rf / applied to the device, which indicates this impulse, which appears at terminals C and
D as two signals in antiphase with each other. The positive direction signal at terminal C is shown
as a damped sine wave 130 in FIG. 3A. When rectified, the waveform portion below the time axis
is inverted and appears above the time axis in a dotted curve). When the rectified signal is
smoothed by an integrating circuit composed of a capacitor 48 and a resistor 56, a voltage e of a
waveform shown by a thick dotted line is obtained. In FIG. 3B, the first impulse of the terminal is
of the same magnitude as in FIG. 3A, but the phase is reversed. Again, after full wave rectification
and smoothing with capacitor 50 and resistor 58, the voltage appearing at the output of rectifier
42 is of the same magnitude and polarity as the voltage appearing at the output of rectifier 40.
By subtracting one from the other in the subtractor 62 furnace, a zero output is formed, so that
the F111-------+1 voltage at node 74 will be K, zero as before. That is, when only one of Lf / Rf /
double signal is present, the voltage at node 72 is positive and the voltage at node 74 is zero,
thereby driving the front speakers 108 and 114 and the rear speakers 110 and 112 are not
driven. Because both the Lf / and Rf 'signals are present in the furnace, even if the two signals
are incoherent, the instantaneous peak value as a function of the time of the signals is
simultaneously when both the Lf / and Rf' signals are present. It does not happen. Therefore,
after rectifying with rectifiers 3.6 and 38 and subtracting with subtractor 60, a net current flows
through rectifier Q4 and a positive voltage appears at node 72. On the other hand, tidyers 4.0
and 42. The net output voltage at node 74 is zero because the resulting voltage remains the same
as described above. That is, even if two separate and distinct signals Lf 'and R, / are supplied to
the circuit, only the gain of the amplifier with respect to the "front" speaker is increased, only the
speaker "front" Is driven and the sound of the "rear" speaker is attenuated. When either or both
of the signals Lb 'and R' are supplied to the decoder 7, a reverse response to that described above
is exhibited. In this case, a net control voltage appears at connection point 74 and a zero voltage
at node T2, so that a negative gain signal Ef and a positive control voltage Eb are obtained,
whereby the "rear" speaker 110 and 112 will be ?thun? and ?forward? speakers 108 and
114 will be ?off?. Thus, as the various signals appear and disappear, the appropriate gain
control amplifiers are "on" and "off" in response to these signals. FIG. 4 shows another example of
the decoder of the present invention in which the operation characteristics are not impaired (the
simplification of the circuit is made, and a modified example of the above-mentioned logic circuit.
In order to carry out the decoding in the circuit of FIG. 1, it is first necessary to provide 900
relative phase transitions by means of one network 26 and q28 to form orthogonal signals Lf
'and Rf' . It is not preferable to define O in such a relationship except when the two signal
components include a common central signal. In order to form a virtual sound image of this
center signal in the middle between the two front speakers, it is desirable to keep the two front
signals in phase.
Such a relationship can be obtained by rl111111EndPage: 7 various methods. The system of FIG.
1 uses the method of adding four single networks 84, 86, 88 and 90. As noted above, decoders
not intended for high quality listening may omit one network 84-90. Instead, connect the two
front speakers (ie, 108 and 114) to A 'and B' instead of terminals A and B, and to the two front
speakers, the unmodified full signal LT and Supply RT respectively. These signals LT and RT
contain the signals Lf and R as the main components in an appropriate phase relationship,
however, if so, the two front speakers and the two rear talk cars are also included. In the
narrowing of one function phase angle, there occurs a degree of ? blurring and asymmetry of
the sound image on the side and back. This does not significantly impair the quality of the 4channel stereo, which is a compromise and acceptable for lower priced equipment. ? However,
in high-level professional equipment, it is important to optimize the topological relationship
between vectors. Such requirements can be met in the "deco" example shown in FIG. 4A.
According to this decoder, it is possible to make the relative phase relationship of the signals
supplied to the speakers identical to those obtained in the example of FIG. 1A, but in this example
two one networks are omitted. can do. That is, the device of FIG. 4A requires only four V
networks instead of six---In this decoder, the signal is reproduced from a two-channel medium
and indicated by vectors 10 and 12, respectively. Two combined four channel stereo signals LT
and RT are provided to terminals 150 and 152, respectively. These signals are all equal to the
corresponding signals applied to the input terminals of the decoder of FIG. 1A. However, unlike
the device of FIG. 1A, which uses two V networks that appropriately change the phase of these
two signals for the operation of the next stage, the decoder of FIG. 4A has four similar ones.
Using networks 154, 156, 158 and 160, two of which give a phase shift of (F + 00) and the other
two give a phase shift of (F 90 90 ░), so that the LT signal 1 It is provided in parallel to
networks 154 and 156 and in parallel to RT multiplier signal networks 158 and 160. By
providing a relative phase shift of 900, the vectors 162 and 164 appearing at the output
terminals of one network 154 and 156 corresponding to the LT double signal are orthogonal to
each other, and the same <RT double signal compatible The phases of vectors 166 and 168
appearing at the output terminals of one network 158 and 160 are also orthogonal to one
The phase angle V generally varies with frequency, the vector groups 162, 164, 166 and 168 are
not in a fixed angular relationship with the vector groups 10 and 12, but the reference angle V is
identical for all V networks Then, the above vector component groups can be treated as having a
fixed relationship with each other. Since signals Lf ', Lb', Rb 'and Rf' are usually complex program
signals, the phase relationship in each vector group indicates the relationship of the same
frequency component of the signal. ? Similar to the circuit of FIG. 1A, the decoders signal Lf ?
from the incoming signals LT and RT respectively. Four separate signals including Lb ', Rb2 and
R' as main signals are taken out and reproduced by the respective speakers 170, 172, 174 and
176. To that end, the signals shown by vector groups 162 and 168 are supplied as they are to
gain control amplifiers 178 and 180, and their outputs are supplied to speakers 170 and 176,
respectively. In the summing circuit 182, a signal including Lb 'as a main signal is extracted by
adding the output of the 7 network 156 multiplied by 0.707 and the output of the one network
160 multiplied by 0.7'07. . The output of the summing circuit 182 is represented by a vector
group 184. In this vector group 184, the signal Lb 'is a main signal, along with which the signals
Lf' and Rf 'are also included at a level 3 dB lower than the signal Lb /. This signal is amplified by
the gain control amplifier 186 and then supplied to the speaker 172 '. In the summing circuit
188, a signal including the Rb 'signal as a main signal is taken out by adding 0.707 times each of
the state powers of the W network 154 and 1 ? 58. The signal is represented by a vector group
190. Such signal is supplied to the control amplifier 192 and then applied to the speaker 174.
Thus, the speakers 170.172, 174 and 176 are supplied with signals including the main
information from the front left, rear left, rear right and front right channels, respectively. F of
Figure 1A - + - + - + - + - + - + 1EndPage: 8 as in the case of the decoder two or mixing each of
these signals and information from the other two signals. However, the signal to be mixed is a
part of the same original program, and the effect is not unpleasant, and in fact, the music
"performs the surroundings", that is, to improve the spread of the music. Often helpful.
Note that although the vector groups 162, 184, 190 and 168 show the same relative phase shift
relation as the vector group of the corresponding part of FIG. 1A, the apparatus of FIG. 1A can
obtain the same result. While one single network is required, in the present example, such a
desired-desired relationship can be realized with only four seven networks. That is, according to
the decoder shown in FIG. 4A, the structure can be simplified, and the price can be reduced by
busy. A satisfactory decoder composed of a circuit arrangement consisting of four seven
networks and two total NO circuits is connected to a suitable amplifier (by connecting it to a
speaker, the program for the original four channel stereo is extremely realistic and It can be
reproduced in a satisfactory manner. As with the decoder of FIG. 1A, in order to obtain the
perception that the signal to be reproduced is more independent, ie ?pure?, the logic and
control circuits ?emphasize? the individual main signals It is desirable to provide For that
purpose, the control and control circuit 34 shown in FIG. 1B can be used without being
surrounded by a dotted line frame in FIG. 4B. At the output terminals of the V networks 160 and
15 ', the two signals designated vector group 16B and Toro 4 are provided to a pair of gain
control amplifiers 202 and 204, respectively. A common control signal is applied to each gain
control terminal 206 and 20.8 of the amplifier so that the gains of these amplifiers are
approximately equal to each other. The outputs of these amplifiers 202 and ff 204, represented
by vector groups 168 'and 164', are: The same vector groups 168 and 164 at the output
terminals of F networks 160 and 156 are at different but identical phase positions. These vector
groups respectively contain the signals Lf 'and Rf' of the left front and right front channels as
main signals, and further include 0.7.07 times of the signals Lb / and Rb / respectively. ?? In
the summing circuit 210FC, the left rear signal Lb / is obtained as the main signal by adding the
output of the amplifying amplifier 202 multiplied by 0.707 and the output of the amplifier 204
multiplied by [111111] 0.707. Take out a new signal including as Similarly, the signal Rb 'is
included as a main signal by algebraically adding, in the summing circuit 212, the output of the
amplifier 204 multiplied by 0.707 and the output of the amplifier 202 multiplied by -0,707. Take
out the signal of
Since these latter two signals are in the same phase relationship as vectors in the decoder, 184
and 190, they will be similarly denoted as 184 'and 194'. It should be noted that, since the vector
groups 168 ', 184', 190 'and 164' are in the same relative magnitude and phase position as the
vector groups 16, 18 and 20 and 14 in FIG. 1A, It will be appreciated that the described
"waveform matching" and recognition functions are equally applicable to this example. In order
to perform such functions, the signals 168 'and 164' are respectively rectified or preferably fullwave rectified by the rectifiers 2.14 and 2), and the rectified signals are smoothed by the RC
integrating circuits 218 and 220. Do. The output voltages at terminals 222 and 224 of the
integrator are then subtracted from each other in subtraction circuit 226, and the resulting
difference signal is shaped by shaping network 228 (with a transfer function as shown) and
amplitude limited Then, the voltage is rectified again by the rectifier 230 and integrated by the
integrator comprising the capacitor 232, the rise time control resistor 234 and the fall time
control resistor 236. Signals 184 'and 190! Are similarly full-wave rectified in rectifiers 240 and
242 respectively and further integrated in each RC integrator circuit 244 and 246, and then the
output voltages appearing at each output terminal 248 and 250 are subtracted from each other
in subtraction circuit 252. The resulting difference signal is shaped by the shaping network 254
having a transfer function similar to that of the shaping network 228 and amplitude-limited, and
then full-wave rectified by the rectifier 256, and further resistances 2 и '58 and 260 Integrate
with a circuit consisting of and a capacitor, 262. The fall (i.e. discharge) time of the integrators
218. 220, 244 and 246 is determined by the product of the capacity value of each integrator and
the resistance value of 9, but It is preferable to make this fall time about 20 milliseconds.
However, the present invention is not limited to only this value. The charge time of capacitors
232 and 262, which are determined by resistors 236 and 260, respectively, and the fall times of
these capacitors, which are determined by [111111] EndPage: 9 and resistors 234 and 258,
respectively, are 20 ms and 250 'mm, respectively. It is preferable to set the value in seconds, but
these values can also be varied widely without impairing the operation of the regenerator
according to the invention. The output of the integrator appearing at each of the output terminals
264 and 266 is subtracted by the pair of subtraction circuits 268 and 270 in a reverse
complementary manner, and the control signals Ef and Eb are respectively taken out from the
output terminals of these subtraction circuits.
The Ef control signal is provided in parallel to the control terminals of amplifiers 178 and 180,
thereby controlling the signals applied to the "forward" speakers 170 and 176 respectively and
in parallel to the control terminals of Eb control signal amplifiers 186 and 192. Control the
signals applied to the "rear" speakers 172 and 174 respectively. The gain control amplifier is
similar to that described above for FIG. 1A and its gain control characteristics are similar to FIG.
However, this is an example, and the present invention is not limited thereto. Similar to the
device of FIG. 1, with the gain control function properly defined, the gain rises relatively quickly
(eg, in about 20 milliseconds) in response to positive changes in the gain control voltage. When
the gain control signal decreases, it is set to be extinguished slowly (for example, in about 800
milliseconds). As with the other time control functions, these values can be varied substantially
without compromising the basic operation of the invention and can be appropriately adjusted to
the average listener's musical preferences. It is desirable to keep the range of the control voltages
Ef and Eb within the limits shown in FIG. 2, that is, between the voltage -E when the amplification
is cut off and the voltage Em corresponding to the maximum gain. The reason is that it is
meaningless to apply a gain control voltage to the gain control amplifier beyond these limits. In
this example, to determine the amplitude of the control signal, summing circuit 272 sums the
outputs appearing at output terminals 222, 224, 248 and 250, The gain control terminals 206
and 208 are supplied in parallel. In this way, the gains of amplifiers 202 and 204 are
automatically adjusted to adapt to changes in the amplitude of the human power signal. For
example, when the amplitudes of the signals LT and RT supplied to the input terminals 10 and
12 are low, the summation signal changes in the direction to increase the gain of the amplifier,
and the gain of the amplifier decreases rapidly when the human power level is high, Keeping the
sum of the signals at terminals 222 ░ 224.248 and 250 approximately constant, the limit values
of control signals Ef and Eb are further determined by waveform shaping networks 228 and 254,
the transfer characteristic of this network being the most It can be selected by experiment so that
effective and pleasant regeneration can be performed. A guide to this adjustment is to increase
the gain of the front speaker amplifiers 178 and 180 to maximize when the single signals Lf and
Rf are applied to the input terminals 150 or 152, and at that time the rear speaker amplifiers
Reduce the gains of 186 and 192 to zero.
To make such adjustments, it is preferable to provide gain control adjustment knobs to adjust the
transfer functions of the waveform shaping networks 228 and 254. It should be noted that the
waveform shaping networks 228 and 254 need not be disposed as shown, but may be disposed
in the output leads of the subtractors 268 and 270.
BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1A and 1B are block diagrams showing an
example of the configuration of the decoder of the present invention, FIG. 1C is a series of vector
diagrams for explaining the operation of the present invention, and FIG. 3A and 3B are operation
explanatory curves of the circuit of FIG. 1, and FIGS. 4A and 4B are block diagrams of other
examples of the present invention. is there. 10.12, 14, 16, 18, 20 ииииииии signal, 20, 24
иии Phase transition network, 30, 32 и и и .... Sum circuit, A, B, C. D иии и и и и и и и и и и и и и и и и и и и и и и и и и и и и и
и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и 36, 38. 40.42 и и и и и и и и и и и и и и и и и и
и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и capacitor, 52, 54, 56, 58 и и и и и и и
resistance 60, 62 и и и и и Subtractor circuit 64, 66
иииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииии Waveform
shaping circuit Net, 80 ░ 82
Signal, width unit, 108 110, 112, 114 иииииииии Speaker, 116 ииииииииии Listening room, 11B. 11111111
EndPage: 10120.122, 124 иии и и и и и и и и Control electrode, 128 и и и и и и и и и и и и и и и и и и и и и и и terminals,
154 ░ 156. 158 и 160 и и и и и и и V circuitry 162 ░ 164.166.168 ...... vector group, 170 ░
472.174,176 иииии ? и speaker, 178180.186,192 ...... gain control amplifier; 182.188
иииииииииииииииииииииииииииииииииииииииииииииии Total circuit, 184, 190
иииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииии Gain control amplifier;
ииииииииииииии Gain control terminal, 210, 212 иииииииииииииииииииииииииииии Total circuit, 164 ? ?, 16B ?, 184 ?,
190 ? ииииии Vector group, 214, 216 ?, 240.2 42 ...... rectifier, ...... RC
integrating circuit, 222,224.248.250 ...... terminals, 1: ')' 226.252 - иииииииииииииииииииииииииииииииииииииииииииииииииииииииии. и
и и и и и и и и и Shaping network, 230, 256 и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и capacitor, 234.258 и и и и
и и и и и и и и и и resistor for controlling the rise time, 236, 260 и и и и ... Fall time control resistance, 264.
? 47-20. .
Radio frequency science November 1970 issue page 54-55 published by the Japan Broadcasting
and Publishing Association, '? ? i ... 1 ? ? \ W4444441 EndPage: ??
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