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JP2003179466

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DESCRIPTION JP2003179466
[0001]
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a
digital signal processing apparatus and an audio reproduction apparatus provided with the same,
and more particularly to an improvement of an apparatus for digital signal processing of audio
data using a digital filter.
[0002]
2. Description of the Related Art As a digital signal processing apparatus of this type, there is, for
example, a circuit used for sound quality processing of an audio reproduction apparatus (digital
audio apparatus). Usually, in such an audio reproduction apparatus, for example, as shown in FIG.
4, a path for transferring audio data (digital signal) to a D / A (Digital / Analog) converter 3 via a
digital filter, and the audio data. A path for transferring to the D / A converter 3 without passing
through the digital filter 1, that is, bypassing the digital filter is provided. That is, when it is
desired to emphasize voice in a desired frequency band, digital signal processing is performed on
the same data so that the value of the same frequency band corresponding to the voice data is
selectively raised by the digital filter 1. As a result, the sound output from, for example, a speaker
or the like via the D / A converter 3 becomes one in which a specific frequency band is
emphasized. On the other hand, when such processing such as emphasizing is not desired, the
switch circuit 2 selects a route bypassing the digital filter 1, and audio data is directly transferred
to the D / A converter via the same route. It is converted to a signal.
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[0003]
By the way, conventionally, the switching between each of the above paths, that is, the path
through the digital filter and the path bypassing the path is performed through the abovementioned switch circuit or the like. For this reason, for example, when switching to a path
bypassing the digital filter is performed during digital signal processing using the digital filter,
discontinuous change of audio data can not be avoided. In this case, noise may also be generated
in the sound output from the speaker or the like through the D / A converter due to the
discontinuity of the sound data.
[0004]
The present invention has been made in view of such circumstances, and an object thereof is to
provide a digital signal processing device and the processing device capable of preferably
suppressing the generation of noise at the time of switching necessity of filtering by a digital
filter. An object of the present invention is to provide an audio reproduction device.
[0005]
According to the present invention, there is provided a filter circuit for performing a filtering
process according to a predetermined coefficient on digital data of a plurality of bits inputted at a
constant period, and a filter for setting the coefficient of the filter circuit. A control circuit,
wherein the filter control circuit is responsive to a filter stop command to change the coefficient
so as to make the output data of the filter circuit equal in steps to the input data. It is possible to
preferably suppress the generation of noise when switching the necessity of processing.
[0006]
Further, according to the present invention, there is provided a filter circuit which performs filter
processing according to a predetermined coefficient on audio data of a plurality of bits input at a
constant cycle, a filter control circuit which sets the coefficient of the filter circuit, and the filter
circuit A D / A converter for converting the digital data subjected to the filter processing into an
analog signal, a reproduction circuit for converting the converted analog signal into a sound and
reproducing the sound, and a command circuit for instructing the necessity of the filter
processing; And the filter control circuit is capable of changing the coefficient so that the output
data of the filter circuit becomes stepwise equal to the input data of the filter circuit in response
to the filter processing stop command. Do.
[0007]
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2
In this specification, "multiplying the coefficient" includes always multiplying "1".
Then, as a multiplier that always multiplies by “1”, a wire that transfers data as it is is
included.
[0008]
BEST MODE FOR CARRYING OUT THE INVENTION An embodiment in which a digital signal
processing apparatus according to the present invention is mounted on an audio reproduction
apparatus (digital audio apparatus) will be described with reference to the drawings.
[0009]
FIG. 1 shows a digital signal processing device and a portion of converting the digital signal
processed by the device into an analog signal and reproducing it as sound in the abovementioned sound reproducing device.
[0010]
As shown in FIG. 1, in the above-mentioned audio reproduction apparatus, audio data (digital
signal) having a sampling frequency “fs (for example 44.1 kHZ)” and quantization bit number
“16” is provided with the sound quality processing unit 10 Digital processing is performed in a
digital signal processor.
Here, the audio data subjected to the predetermined digital processing is transferred to the
interpolation filter 20.
The interpolation filter 20 is a filter that oversamples the sampling frequency fs of the input
audio data by eight times.
The voice data oversampled to a sampling frequency of 8 (8 fs) in this way is modulated by the
noise shaper 30 into a digital signal whose sampling frequency is further multiplied by 8 and
whose number of bits is 3 bits.
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[0011]
The voice data (3-bit digital signal) modulated by the noise shaper 30 is further modulated by a
pulse width modulator (PWM) 40 into a digital signal consisting of a sampling frequency of 384
fs and 1 bit.
Then, the 1-bit digital signal (audio data) is appropriately amplified by a class D amplifier (not
shown) or the like, and then converted into an analog signal by the low pass filter LPF 50. The
noise shaper 30, the pulse width modulator 40 and the low pass filter 50 constitute a D / A
converter.
[0012]
Thus, the signal converted into an analog value by the low pass filter 50 is output as sound from
the output unit 60 provided with, for example, a speaker or the like, which is an electric-voice
converter.
[0013]
Next, the digital signal processing apparatus according to the present embodiment will be
described in detail.
The sound quality processing unit 10 constituting the processing circuit includes a digital filter
as illustrated in FIG. This filter includes: a delay element (represented as Z-1 in the figure) for
delaying the input data X (Z) and the output data Y (Z) by one sample period; input data X (Z) and
a delay element (Z- Multipliers 11-15 for multiplying the delay data delayed by 1) by a
predetermined coefficient, and adders 16 and 17 for adding the output data of these multipliers
11-15 as output data of the filter Filter (IIR filter: infinite impulse response filter).
[0014]
Here, delay data obtained by delaying the input data X (Z) by one or more sample periods and
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delay data obtained by delaying the output data Y (Z) by one or more sample periods correspond
to each other. It is set to. In other words, the number of delay elements (Z-1) for delaying the
input data X (Z) and the output data Y (Z) is set equal.
[0015]
The multipliers 11 to 15 multiply the input data by the coefficients (a0, a1, a2, b1, b2) shown in
FIG. 1 and output the multiplied value. Here, the coefficient (a0, a2, b2) is a number of 0 or more,
and the coefficient (a1, b1) is a number of 0 or less.
[0016]
The transfer function H (Z) of this IIR filter is expressed by the following equations (c1) and (c2).
H (Z) = (a0 + a1Z-1 + a2Z-2) / (1 + b1Z-1 + b2Z-2) (c1) Y (Z) = H (Z) X (Z) (c2) Input data X using
the above IIR filter By subjecting (Z) to digital processing, for example, an audio signal of a
predetermined frequency band can be emphasized. Such digital processing using an IIR filter is
performed by operating the sound quality operation unit 70 provided in the audio reproduction
device from the outside. That is, when the sound quality processing unit 10 instructs the sound
quality processing unit 10 to perform sound quality processing, for example, the sound quality
operation unit 70 is operated to emphasize the low frequency range, the filter control unit 80
responds accordingly to the coefficients of the IIR filter. Set as appropriate. Therefore, as shown
in FIG. 1, the filter control unit 80 has a function of assigning values set as the above coefficients
(a0, a1, a2, b1, b2) corresponding to the operation of the sound quality operation unit 70. (In the
figure, mode1, mode2, ...).
[0017]
By the function of the filter control unit 80, it is possible to perform predetermined digital signal
processing in the sound quality processing unit 10 according to the function of the sound quality
operation unit 70. However, when switching from the IIR filter to transfer the input data X (Z)
directly to the interpolation filter 20 when an instruction to cancel the filter processing from
outside is given via the sound quality operation unit 70, Digital data input to the interpolation
filter 20 becomes discontinuous. And in connection with this, having mentioned above that noise
occurs to data outputted from the above-mentioned output part 60 was mentioned above.
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[0018]
Therefore, in the present embodiment, when the processing is canceled at the time of digital
signal processing in the sound quality processing unit 10, the coefficients (a0, a1) are set so that
the output data Y (Z) becomes equal to the input data X (Z) stepwise. , A2, b1, b2). Thereby, when
canceling the digital signal processing, the discontinuity of the data input to the subsequent stage
of the portion to be subjected to the processing, in other words, the data input to the
interpolation filter 20 is alleviated, and thus the processing is stopped. Generation of
accompanying noise can be suitably suppressed.
[0019]
Specifically, in the present embodiment, the IIR filter is configured such that at least one of the
coefficients (a1, a2, b1, b2) to be multiplied by the data delayed by the delay element (Z-1) is a
value other than 0. The above coefficients are changed so that the numerator and denominator of
the transfer function H (Z) of H.sup. This sets the coefficient a0 by which the input data X (Z) is
multiplied to "1", and samples equal to each other among the delay data of the input data and the
output data delayed by each delay element (Z-1) This is done by equalizing the coefficients
multiplied by the data delayed by several minutes. That is, as shown in FIG. 1, the coefficients are
set by setting a0 = 1, a1 = b1, a2 = b2 (c3).
[0020]
Specifically, the setting of this coefficient is performed as follows. That is, in order to ensure the
stability of the filter, the poles of the transfer function are set within the unit circle for the
coefficients b1 and b2 that come to the denominator of the transfer function. Furthermore, when
setting as in the above equation (c3), for example, the output data Y (Z) is set in stages to the
input data X (Z), such as setting a1, b1, a2, or b2 to a number smaller than “1”. Set each
coefficient to be equal (slowly) equal.
[0021]
In the normal digital signal processing, the coefficients b1 and b2 used for the denominator of
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the transfer function are set to ensure the stability of the filter. Therefore, when it is possible for
the output data Y (Z) to converge to the input data X (Z) (become stepwise equal) by these
coefficients, when changing the coefficients accompanying the cancellation of digital signal
processing It is desirable to change the coefficients a1 and a2 without changing the coefficients
b1 and b2.
[0022]
By setting in this manner, the output data Y (Z) remains at the end of digital processing because
the data latched in each delay element (Z-1) affects the output data Y (Z). It will become equal
step by step without becoming to coincide with the input data X (Z) sharply.
[0023]
FIG. 2 shows a simulation result of an example of transition of a signal (data) input to the
subsequent stage of the IIR filter when the digital signal processing is stopped.
FIG. 3 shows input data, FIG. 2 (a) shows the case of performing the above coefficient operation
according to the present embodiment, and FIG. 2 (b) shows the IIR filter at the time of
cancellation of processing without performing the above coefficient operation. The cases of
bypassing are shown respectively.
[0024]
In FIGS. 2 (a) and 2 (b), a sine wave shown in FIG. 3 as input data X (Z) is input to the IIR filter,
and digital signal processing is canceled at sampling time "3.00". Show the case. As shown in
these figures, when the coefficient is changed (FIG. 2 (a)), abrupt change of the output data is
suppressed as compared with the case where it is not performed (FIG. 2 (b)). . FIG. 2C is an
enlarged view of the vicinity at the time when the digital signal processing is stopped in FIGS. 2A
and 2B.
[0025]
According to the present embodiment described above, the following effects can be obtained. (1)
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When canceling the processing at the time of digital signal processing by the IIR filter, the above
coefficient is changed so that the output data Y (Z) becomes equal to the input data X (Z)
stepwise. Thereby, the noise which arises at the time of cancellation of the said process can be
suppressed suitably.
[0026]
(2) As an IIR filter, delayed data obtained by delaying input data X (Z) by one or more sample
periods and delayed data obtained by delaying output data (Z) by one or more sample periods
correspond to each other Adopted the configuration of Thereby, among the delay data of the
input data and the output data delayed by each delay element (Z-1), the coefficients multiplied by
the data delayed by the same sample period are equalized easily, etc. The numerator and
denominator of the transfer function can be set equal.
[0027]
The above embodiment may be modified as follows. The coefficient shown in the above equation
(c3) may be changed stepwise as shown in the same equation (c3) instead of changing the
coefficient in one step.
[0028]
As the IIR filter, delayed data obtained by delaying the input data X (Z) by one or more sample
periods and delayed data obtained by delaying the output data Y (Z) by one or more sample
periods correspond to each other The configuration is not limited to the In this case, with regard
to the input data and output data delayed by each delay element (Z-1), in any of the following
cases, that is, (i) equal to the delay data of the output data among the delay data of the input data
When there is no data delayed by the number of samples (b) Among the delay data of output
data, when there is no data delayed by the number of samples equal to the delay data of the
input data, these delay data are multiplied The numerator and denominator of the transfer
function are set equal by setting the factor to "0". At this time, it is desirable to shift the
coefficient to "0" step by step in setting "0".
[0029]
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-Not only the IIR filter, for example, even in the case of an FIR (finite impulse response) filter, the
data discontinuity may be achieved by changing the above coefficient to equalize the output data
stepwise with the input data as the digital signal processing is stopped. Can suppress the
problem of noise caused by At this time, it is desirable to set the coefficient to be multiplied by
the input data to “1” and to set the coefficient to be multiplied to the delay data of the input
data to “0” in stages. At this time, the coefficient to be multiplied by the input data may be set
to “1” in stages.
[0030]
-It is not necessary to necessarily have a configuration in which the digital signal processing
mode is switched by an external command, and the same processing is automatically performed
under predetermined conditions in an apparatus equipped with a digital signal processing
apparatus such as an audio reproduction apparatus. It may be a switch.
[0031]
According to the inventions of claims 1 and 5, the coefficient is changed so that the output data
becomes equal to the input data stepwise in accordance with the command to cancel the filtering
process by the filter circuit. Thus, noise generated at the time of the same cancellation can be
suitably suppressed.
[0032]
According to the present invention, the denominator and the numerator of the transfer function
of the filter circuit become equal, with at least one of the coefficients to be multiplied by the
delayed data being a value other than 0. By setting the coefficient to, it is possible to easily set
the output data to be equal to the input data stepwise.
[0033]
According to the invention of claims 3 and 7, by setting the first coefficient to "1" and equalizing
the second and third coefficients, the output data is equalized stepwise to the input data. Settings
can be easily performed.
[0034]
According to the fourth and eighth aspects of the present invention, the coefficient by which the
input data is multiplied is "1", and the value of the coefficient by which the delayed data is
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multiplied is gradually set to "0". It is possible to easily set the output data to be equal to the
input data in stages.
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