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JPS5669690

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DESCRIPTION JPS5669690
Specification 1 and title of the invention Piezoelectric Buzzer Volume Control Method Electronic
Equipment Equipped with a Piezoelectric Buzzer Driven by a Pulse Signal The frequency or pulse
of the pulse signal at each operation of the external operation switch and the external operation
switch A volume control system for a piezoelectric buzzer, comprising: pulse modulation means
for changing a width; and means for supplying a pulse signal obtained by the pulse modulation
means to the piezoelectric buzzer.
2, the scope of claims
3. Detailed description of the invention The present invention relates to the volume control
method of the piezoelectric buzzer provided in electronic devices such as electronic watches,
electronic small computers, etc. Electronic watches, electronic devices of electronic small
computers, time signals, alarms Generation of sound etc. or generation of numeric keypad
operation sound is provided with a piezoelectric buzzer. 0 This piezoelectric buzzer is made by
attaching a piezoelectric element to a diaphragm made of metal or glass, etc., and is driven by a
pulse signal Also, the piezoelectric buzzer has the property of sounding with a maximum sound
when a pulse signal having a frequency equal to its resonant frequency is given O (= generally,
the above-mentioned resonant frequency is the supporting state of the diaphragm, It changes by
various factors, such as the attachment position of the terminal which gives a pulse signal to the
piezoelectric element or the strength of its pressing force, so the piezoelectric buzzer attached to
the electronic device is not always the best. There is a case that the sound is not sounded, and the
volume may have to be adjusted with a polytheme switch etc. This invention has been made in
consideration of the above circumstances, and its purpose is Operation I of the external switch:
By changing the frequency or pulse width of the pulse signal for driving the piezoelectric buzzer,
the resonance frequency of the piezoelectric buzzer (double coincidence, maximum sound can be
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generated most efficiently, and the amount of folding) It is an object of the present invention to
provide a volume control method of a piezoelectric buzzer which is easy to adjust. Hereinafter, an
embodiment in which the present invention is applied to an electronic watch will be described
with reference to the drawings. Fig. 1 shows the entire circuit structure of the electronic watch!
In FIG. 0, l is an oscillator, EndPage: 1 Reference frequency signal ? of frequency 32768 &
generated by this oscillator 1 is inputted to the frequency dividing circuit 2, and this frequency
dividing circuit 2 generates a pulse signal IP having a period of 1 second. The pulse signal IP / S
divided by 0/81 is input to the time counting circuit 3 and counted to obtain hour, minute, and
second information (vi # clock information). The carry signal of the time counting circuit 3 is
input to the date counting circuit 4 and counted, and the date counting circuit 4 obtains year,
month, day, day information (date information). Furthermore, both time-1 and date information
obtained respectively by the time counting circuit 3 and the date counting circuit 4 are sent to
the display unit 6 through the display switching circuit 5 and are switched and displayed. The
pulse signal P output from the one seat circuit 7 for each operation of the switching switch 8W1
is input to and counted by the mode counter 8 formed of a ternary counter. Therefore, the
contents of the mode counter 8 sequentially change to rOJ, [1], [2], ?0?,... And correspond to
the contents ?0?, ?1.?, ?2?. The signals outputted from the terminals "0" #, "1" and "2" are
inputted to the display switching circuit 5 and the setting control circuit 9, and the display
switching circuit 5 and the setting control circuit 9 are respectively controlled in operation.
On the other hand, pulse signals P1 and Ps output from one-shot circuit 10.11 at the time of
each operation of digit selection switch SW2 and correction switch SW3 are input to setting
control circuit 9, and control output can be output from setting control circuit 9. The signals C + Ct, On are input to the time counting circuit 3, the date counting circuit 4, and the alarm time
storing circuit 12, respectively, and the contents of the mode counter 8 are being set to "0 #" The
binary logic level "H" (high-lepern signal is output (therefore the other terminal ░ "1" and "2"
outputs the "L" (low level) signal) It is output. Further, when the ?H? signal is given to the
display switching circuit 5 and the setting control circuit 9 and at this time, the display unit 5
selects time information from the time counting circuit 3 by the switching operation of the
display switching circuit 5. While this mode is set to "0", when the digit selection switch S, W2 is
operated, the hour, minute, second of the time counting circuit 3 are obtained from the control
signal C3I2. One of the digits is selected, and the selected digit is displayed, for example, on the
display unit 6 in a blinking manner. At this time (when the second correction switch SW3 is
operated, a desired time can be set for the upper selection digit by the control signal C6. Also,
when the content of mode counter 8 is set to 1 (when (mode) is ?1?), ?H # times the signal is
output only from terminal? l # ?, and to display switching circuit 5 and setting control circuit 9
At this time, the date information is displayed on the display unit 6 at the second time, and when
the digit selection switch SW2 and the correction switch SW3 are operated, the year, month, day,
and so on by the control signal C3. Among the digits of the day [], the contents of the desired
digit can be corrected. Furthermore, while the content of mode counter 8 is set to 12 ? ? ?
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(when mode @ 2 ? ?, only ?H? (No. 8 is output from terminal ?2 #?, display switching
circuit 5 is set. At this time, when the digit selection switch SW2 and the correction switch 8W3
are operated, the control signal Cs is output, sent to the display 5 s6 and displayed. The alarm
time is input to the input terminal B of the coincidence circuit 13 and compared with the time
information from the time counting circuit 3 input to the input terminal A of the coincidence
circuit 13. When a match is detected, the match detection signal output from the output terminal
C of the match circuit 13 is input to the alarm control circuit 14 and the piezoelectric signal is
output from the sound control circuit 14 at this time according to the pulse signal f. The buzzer
circuit 15 is driven and an alarm sound is emitted. In this embodiment, in this embodiment, an
alarm sound is output when the scattering detection signal is output or each operation of the
switches sW1, SW2, and SW3. The frequency or pulse width of the pulse signal f output from the
control circuit 14 to the piezoelectric buzzer circuit 15 can be changed to control the volume of
the alarm sound emitted from the nine piezoelectric buzzer circuit 15 optimally. Is configured as.
For this reason, each operation signal of the mode changeover switch 8W1 ░ 6-EndPage: twodigit selection switch SW2 is input to the angling gate 16 and the output of the AND gate 16 is
input to the notification sound control circuit 14, while the AND gate The pulse signal Pa from
the one-shot circuit 11 is also input to the signal 17 and the output of the AND gate 17 is further
input to the sound control circuit 14. Further, the reference frequency signal ? from the
oscillator 1 is input to the alarm control circuit 14. The zero counter 20, which will be described
in detail with reference to FIG. 2 and the details of the sound control circuit 14 and the
piezoelectric buzzer circuit 15, operate as an 11 'base counter in this embodiment, and the
output pulse of the AND gate 17 is also described. Therefore, counting operation is performed by
inputting to the input terminal 0. Therefore, the pulse output from the AND gate 17 each time
the correction switch 8W3 is operated while simultaneously operating the mode changeover
switch SWI and the digit selection switch 8W2 The contents of the counter 20 change to 10 #,
?1?, ?2?,..., ?9?, ?10? 0 or the signal of the contents of the counter 20 is input to the
decoder 21 When the decoded 0 and the content of the counter 20 are @ 01, '1 #,' 2 ',... 19', '10',
the corresponding output terminal of the decoder 21 @ 0 '', '1' ?1 #? signal is output from ?2
#,... @ 9?, ?10 #, and the decoder 22.23 (two units are configured to provide two powers, while
the decoders 22.23 are respectively , The counter of 24.25 is provided. The counter 24 is
composed of a quaternary counter, and carries out a counting operation by inputting a carry
signal t described later to its input terminal (+1). l #, '2 #... @ 9' according to the reference
frequency signal, which is a counter whose base number changes sequentially to 22nd, 21st,
20th,. The counting operation is performed by inputting ? to its input terminal (+1). Therefore,
the coincidence detection signal or the output signal of the AND gate 16 is input to the AND gate
26 via the OR gate 27 and the reference frequency signal output from the AND gate 26 when the
AND gate 26 is opened. 0 is counted by the counter 25 and the contents of the counter 25 are
decoded by the decoder 23, and the contents of the counter 24 are further decoded by the
decoder 22. In this case, when the content of the counter 20 is "0", that is, when the "H" signal is
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output from the output terminal 102 of the decoder 21, the content of the counter 24 is @ 0 #,
II1m, -2m. , M3 # When the contents of C counter 25 are respectively "5", "5", @ 6 #, @ 6 ", the
above-mentioned carry signal t is outputted one by one from each decoder 22. The carry signal t
is input to the reset input terminal R of the counter 25 to reset the counter 25 and is
simultaneously applied to the input terminal of the counter 24 and counted as described above.
Thus, the counter 25 operates as a 5-, 5-, 6-, 6-hexadecimal counter (total 22-ary counter) when
the contents of the color / row 20 are '0'. When the content of 24 is "31", the broad output (the
above pulse signal f) of the decoder 22 (the above-mentioned pulse signal f) is added to the
piezoelectric buzzer circuit 151:--"-, and an alarm sound is emitted. Similarly, when the content of
the counter 20 is ?1 #?, the counter 25 changes the contents of the counter 24 to ?O?, 11 ?
?, ?2 #,? ?3 #,? and the system of ?5- #? The respective decoders 22.23 are configured to
operate as counters of 5 digits and 6 digits (total 21 digits). In exactly the same way, the counter
25 operates as each counter of 20 digits, 19 ways,..., 13 digits when the content of the counter
20 is further 12 '', @ 3 #,. Each decoder 22.23 is configured in the same manner. Further, when
the content of the counter 20 becomes 110 ? ?, the decoder 21 outputs a reset signal R 3, and
the reset signal R 8 is applied to the reset input terminal R of the counter 20 to reset the counter
20. On the other hand, when the pulse signal f is input to the piezoelectric buzzer circuit 15, it is
amplified by the amplifier 30 and then added to the base of the NPNet transistor 7 resistor 31.
Further, between the collector of the transistor 31 and the power supply terminal (+), a vibration
circuit 32 to which a piezoelectric element is attached and a resonant circuit 34 formed by
connecting in parallel a car 10-EndPage 33 are connected. Further, the emitter of the transistor
31 is connected to the power supply terminal (-). 0 The piezoelectric buzzer circuit 15 is driven
by the pulse signal f to emit an alarm sound. Next, the operation of the above embodiment will be
described. The oscillator 1 always generates a reference frequency signal ?, which is also
applied to the branch circuit 2 and the alarm control circuit 14. On the other hand, since divider
circuit 2 generates 1 second (twice, it generates signal IP / S and inputs it to time counting circuit
3), 1 time counting circuit 3 and date counting circuit 4 perform clocking operation, and these
circuits The time information and date information obtained from 3.4 are given to the display
switching circuit 5. Thus, when the content of the mode counter 8 is set to tOIT by the operation
of the mode switch SWI, the above time information is selected by the display switching
operation of the display switching circuit 5 and displayed on the display unit 6 0 Further, when
the content of the mode counter 8 is ?1 ? ?, and the mode l ? ? is set, date information is
selected and displayed on the display 816.
Further, when the content of the mode counter 8 is @ 2 "and the mode 121 is set, the alarm time
which is set in the alarm time memory circuit 12 is selected and the display f! Displayed at 86. In
addition, even when any of the modes 10 ', @ 1 "and" 2 "is set, the time information displayed on
the display unit 6 by operating the digit selection switch SW2 and the correction switch SW3. ,
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Date information, the contents of the desired digit of the alarm time can be corrected while trying
0 on the display unit ? ? Next, the alarm time C set in the alarm time memory circuit 12; The
operation at the time of controlling the volume of the alarm sound by operating the switches SWI
to SW3 when being emitted from the circuit 15 will be described with reference to the time
charts of FIG. 2 and FIG. When the alarm time and the time information coincide and the
coincidence detection signal is outputted from the coincidence circuit 13, the AND gate 26 is
opened, and the reference frequency signal ? is inputted to the input terminal of the counter 25
and counted. Assuming that the content of the counter 20 is "0" at the time of output of the
coincidence detection signal, the @H 'signal is output only from the output terminal "" Om of the
decoder 21 and is supplied to the decoder 22. Since the content of the counter 24 is ?O #?, an
@H signal is output from the output terminal @Om of the decoder 22 and supplied to the decoder
23. After the coincidence detection signal is output, five reference frequency signals ? are input
to the counter 25. When the content becomes "5", the first carry signal is output from the
decoder 23, and the counter 25 is reset. And change the content of the counter 24 to "11." For
this reason, since the H signal from the output terminal 11 of the decoder 22 starts to be output,
five more reference frequency signals ? are input to the counter 25. When the content becomes
?5 #, the second carry signal t Is output, the counter 25 is reset, and the content of the counter
24 becomes 12 ? ?. Therefore, the output terminal ?? ? ? ? 2 m of the decoder 22 starts
to output an H ? ? signal, and six more reference frequency signals ? are output. When the
contents become @ 6 @ 2, the third key 13-jary signal t is output, the counter 25 is reset, and at
the same time, the contents of the counter 24 become @ 3 ", and the output terminal 13" of the
decoder 22 becomes. Starting to output the @H "signal 0. Therefore, six more reference
frequency signals ? are output. When the content of the counter 25 becomes @ 6", the fourth
carry signal t is output. , Therefore, the counter 25 is reset, and the content of the counter 24 is
changed to 10 #, the initial state, i.e., returns to the state at the output of the coincidence
detection signal.
Also, during the above operation, the pulse signal f of the "H" signal is outputted only during the
period of "3" or the content of the counter 24, and the piezoelectric buzzer circuit 15 is driven by
this pulse signal f and an alarm sound is generated. The sound of 0 is shown in FIG. 3 (b) which
shows the contents of the counter 24, the base number of the counter 25, the carry signal t and
the output state of the pulse signal f in the above-mentioned operation. After the detection signal
is output, as the contents of the counter 24 sequentially change from @ 0 "to" 1 "," 2 #, @ 3 ", 10
', the counter 25 is in the form of pentad, pentad, hexad, 6 Each pulse counter operates as a 14EndPage counter, so that the counter 25 operates as a 22-base counter, and the pulse width ("H"
signal period) is 183.1? only when the content of the counter 24 is 131.? ? C's pa In which
the scan signal f is output. Since the operation of this-period is similarly repeated thereafter, the
pulse signal f of the above-mentioned output waveform is repeatedly output, and the alarm
sound continues to be emitted. By the way, if the mode switch SWI and digit selection switch
SW2 are pressed simultaneously to adjust the volume of this alarm sound, and one correction
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switch SW3 is added, one pulse signal is output from the AND gate 17, Thus, the counter 2 o is
incremented by 1 to 11 ? ?, and an ?H? signal is output from the output terminal ?1 ? ?
of the decoder 21 and is given to the decoder 22. While the switch SW1.8W2 is being pressed
simultaneously, the output of the AND gate 16 is @H ", and the AND gate 26 is opened.
Therefore, the reference frequency signal ? is input to the counter 25 and begins to be counted,
and when the first five reference frequency signals ? are counted by the counter 25, the first
carry signal t is output, and the counter 25 is reset. And the content of the counter 24 is
incremented by one to 11 ". Next, when the reference frequency signal ? is output five, five or
six times, the second, third and fourth carry signals t are outputted, and the counter 25 is reset
each time, and the counter 24 is incremented by 1 and changes to "2", "31," "0". Then, the pulse
signal f of @ H # is output and the alarm sound is emitted while the content of the counter 24 is
13 "0. One operation is completed by the above operation, and the same operation is repeated as
follows 0 FIG. 3 illustrates the operation in this case. 0 The counter 25 changes as the contents of
the counter 24 sequentially change from 10 "to 11", @ 21 m, "3", "0". Operates as each of the 5th,
5th, 5th and 6th counters (therefore it operates as a 21st counter), and the pulse width ("H
'signal period") is 183 only when the content of the counter 24 is 13 ". A pulse signal f of 1 ?sec
is output.
The noise signal f output in the case of FIG. 3C ? has a frequency higher than that of the pulse
signal f in the case shown in FIG. Assuming that the content of the counter 20 is 121, the counter
25 operates as a 20-ary counter, so that the pulse signal f obtained has a pulse width of 152.6
?8 ee as shown in tJIJ3), and FIG. 3 (3) The frequency is higher than in the case of (c), so that
the sound quality of the alarm sound to be emitted changes to the page and the volume of the
alarm signal becomes smaller as the duty of the pulse signal f becomes smaller. When the
contents of the counter 20 are sequentially changed to 3 "," 41 ... ... @ 9 ", the pulse shown in 1p,
3 bits (e), (...) ...) Each signal f is obtained and the frequency is (= Higher, also Ruiruiru alarm
sound of sequential volume also pulse width change is sound. Also, when the content of the
counter 20 becomes 110 #, the reset signal R8 is output, the counter 2o is reset, and the initial
state is restored, and an alarm sound is generated by the pulse signal f shown in FIG. 3;
Therefore, the user of the electronic watch can set an alarm sound of a desired volume as desired
by listening to an alarm sound emitted while the volume is sequentially changed by the abovedescribed series of operations. In the above-mentioned example, although the volume of the
alarm sound emitted by the generation of the coincidence detection signal is adjusted, even if the
alarm time under setting is not reached, the above-described switch SW1 The contents of the
counter 20 are changed one by one by the operation of ~ 8W3, and the volume of the alarm
sound is similarly changed sequentially by opening the ang) 26). 0 FIG. 4 which may be the In
piezoelectric buzzer circuit 15, illustrates the variation of the induced voltage due to the
magnitude relationship between the pulse width of the pulse signal f is input ( "H" signal period).
That is, when the pulse width is large as in the turtle in FIG. 4 (1), an induced voltage is
generated larger than in the case where the pulse width is small as in b of FIG. 4 (1). The alarm
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sound of the volume is emitted at t18-EndPage: 5. Although the present invention is applied to
the electronic watch in the above embodiment, the present invention is not limited to the
electronic watch, but may be applied to various electronic devices such as small electronic
calculators equipped with a piezoelectric buzzer that can emit sound by key operation on the
keyboard. The invention is equally applicable. As described above, the present invention
arbitrarily changes the frequency or pulse width of the pulse signal for driving the piezoelectric
buzzer by the operation of the external switch, and arbitrarily changes the volume of the alarm
sound emitted from this. Since the volume control method of the piezoelectric buzzer was
provided, it is easy to set the optimum volume while listening to the alarm sound (= can be set,
and of course, the resonance frequency C of the piezoelectric buzzer matches the alarm sound of
the maximum volume It is also easy to get 0
4. Brief description of the drawings. FIG. 1 is a circuit diagram of the entire embodiment of the
present invention applied to an electronic watch, FIG. 2 is a detailed circuit diagram of a sound
control circuit and a piezoelectric buzzer circuit, FIG. The figure is a time chart explaining the
operation at the time of volume control, and FIG. 4 is a time chart explaining the operation of the
piezoelectric buzzer circuit 01 ииииииииииииииииииииииииииииииииииииииииииииииииии и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и и
и и и и и и и и и и и и и и и и и и и и и Time counting circuit , 9 и и и и и и и и и и и и и и power control circuit, 12 и и и
alarm time memory circuit, 13 и и и и и matching circuit и и и Piezoelectric buzzer circuit, 20.24.25 и и и
ииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииии
ииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииии
и и и и и и и и и и и и и и и и и и и и и Piezoelectric buzzer circuit, 20.24. ... mode selector switch, SW2 ииииии digit
selection switch, SW3 ииииии correction switch. Patent Assignee Casio Computer Co., Ltd. Attorney
Attorney Yamada Hatahiko (2EndPage: ?
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